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Semiconductor Devices

Concepts

Semiconductor (intrinsic, extrinsic) Types (I-Type, N-Type, P-Type)

Devices

P-N Junction Diode Field-effect transistor MOSFET CMOS Integrated circuit Microcontroller Microprocessor SRAM

An integrated circuit (IC) is a semiconductor device which contains multiple electronic components interconnected to form a complete electronic function. Integrated circuits are the most essential part of all electronic products.

Modern integrated circuits contain as much as billions of circuit components such as transistors, diodes, resistors, and capacitors onto a single monolithic die. Those components are interconnected to form a meaningful and complete electronic function. The semiconductor material used is usually silicon, but other alternatives such as gallium arsenide also exist.

Overview

A-to-D converter IC chip in a DIP

Erasable Programmable Read-Only Memory (EPROM) integrated circuits. These packages have a transparent window that shows the die inside. The window is used to erase the memory by exposing the chip to ultraviolet light.

An integrated circuit or monolithic integrated circuit (also referred to as a chip or microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material that is normally silicon. The integration of large numbers of tiny MOS transistors into a small chip results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete electronic components. Most modern IC chips are MOS integrated circuit (MOS IC) chips, which integrate large numbers of metal–oxide–silicon (MOS) transistors onto a single chip. The MOS IC's mass production capability, reliability, and building-block approach to integrated circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. MOS ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.

Integrated circuits were made practical by technological advancements in metal–oxide–silicon (MOS) semiconductor device fabrication. Since their origins in the 1960s, the size, speed, and capacity of MOS chips have progressed enormously, driven by technical advances that fit more and more MOS transistors on chips of the same size – a modern chip may have many billions of MOS transistors in an area the size of a human fingernail. These advances, roughly following Moore's law, make computer chips of today possess millions of times the capacity and thousands of times the speed of the computer chips of the early 1970s.

ICs have two main advantages over discrete circuits: cost and performance. Cost is low because the chips, with all their components, are printed as a unit by photolithography rather than being constructed one transistor at a time. Furthermore, packaged ICs use much less material than discrete circuits. Performance is high because the IC's components switch quickly and consume comparatively little power because of their small size and proximity. The main disadvantage of ICs is the high cost to design them and fabricate the required photomasks. This high initial cost means ICs are only commercially viable when high production volumes are anticipated.

History

An early attempt at combining several components in one device (like modern ICs) was the Loewe 3NF vacuum tube from the 1920s. Unlike ICs, it was designed with the purpose of tax avoidance, as in Germany, radio receivers had a tax that was levied depending on how many tube holders a radio receiver had. It allowed radio receivers to have a single tube holder.

Early concepts of an integrated circuit go back to 1949, when German engineer Werner Jacobi (Siemens AG) filed a patent for an integrated-circuit-like semiconductor amplifying device showing five transistors on a common substrate in a three-stage amplifier arrangement. Jacobi disclosed small and cheap hearing aids as typical industrial applications of his patent. An immediate commercial use of his patent has not been reported.

Another early proponent of the concept was Geoffrey Dummer (1909–2002), a radar scientist working for the Royal Radar Establishment of the British Ministry of Defence. Dummer presented the idea to the public at the Symposium on Progress in Quality Electronic Components in Washington, D.C. on 7 May 1952. He gave many symposia publicly to propagate his ideas and unsuccessfully attempted to build such a circuit in 1956. Between 1953 and 1957, Sidney Darlington and Yasuro Tarui (Electrotechnical Laboratory) proposed similar chip designs where several transistors could share a common active area, but there was no electrical isolation to separate them from each other.

Mohamed Atalla's silicon surface passivation process (1957) was the basis for the planar process (1958) and monolithic integrated circuit chip (1959). He later proposed the MOS integrated circuit (1960).

The monolithic integrated circuit chip was enabled by Mohamed M. Atalla's surface passivation process, which electrically stabilized silicon surfaces via thermal oxidation, making it possible to fabricate monolithic integrated circuit chips using silicon. This was the basis for the planar process, developed by Jean Hoerni at Fairchild Semiconductor in early 1959, which was critical to the invention of the monolithic integrated circuit chip. A key concept behind the monolithic IC is the principle of p–n junction isolation, which allows each transistor to operate independently despite being part of the same piece of silicon. Atalla's surface passivation process isolated individual diodes and transistors, which was extended to independent transistors on a single piece of silicon by Kurt Lehovec at Sprague Electric in 1959, and then independently by Robert Noyce at Fairchild later the same year.

In 2007, Bo Lojek described the contributions of Hoerni, Atalla, and Last, and criticized Kilby. In 2009, Saxena described the work of Dummer, Johnson, Stewart, Kilby, Noyce, Atalla, Lehovec, and Hoerni.

Silicon technology

Further information: Silicon semiconductors

Early transistors were made of germanium. By the mid-1950s it was replaced by silicon which could operate at higher temperatures. In 1954, Gordon Kidd Teal from Texas Instruments produced the first silicon transistor, which became commercial in 1955. Also in 1954, Fuller and Dittsenberger published a fundamental study of diffusion in silicon, and Shockley suggested using this technology to form p-n junctions with a given profile of the impurity concentration.

Surface passivation

Main article: Surface passivation

See also: Thermal oxidation

Surface passivation, the process by which a semiconductor surface is rendered inert, and does not change semiconductor properties as a result of interaction with air or other materials in contact with the surface or edge of the crystal, was first developed by Mohamed Atalla at Bell Labs, in 1957. Atalla discovered that the formation of a thermally grown silicon dioxide (SiO₂) layer greatly reduced the concentration of electronic states at the silicon surface, and discovered the important quality of SiO₂ films to preserve the electrical characteristics of p–n junctions and prevent these electrical characteristics from deteriorating by the gaseous ambient environment. He found that silicon oxide layers could be used to electrically stabilize silicon surfaces. He developed the surface passivation process, a new method of semiconductor device fabrication that involves coating a silicon wafer with an insulating layer of silicon oxide so that electricity could reliably penetrate to the conducting silicon below. By growing a layer of silicon dioxide on top of a silicon wafer, Atalla was able to overcome the surface states that prevented electricity from reaching the semiconducting layer.

At a 1958 Electrochemical Society meeting, Atalla presented a paper about the surface passivation of p-n junctions by thermal oxidation, based on his 1957 memos, and demonstrated silicon dioxide's passivating effect on a silicon surface. This was the first demonstration to show that high-quality silicon dioxide insulator films could be grown thermally on the silicon surface to protect the underlying silicon p-n junction diodes and transistors. By the mid-1960s, Atalla's process for oxidized silicon surfaces was used to fabricate virtually all integrated circuits and silicon devices.

In 1988, Fairchild Semiconductor engineer Chih-Tang Sah described Mohamed Atalla's process of surface passivation by thermal oxidation in the late 1950s as "the most important and significant technology advance, which blazed the trail" that led to the silicon integrated circuit; Atalla's surface oxidation process was the basis for the planar process and p–n junction isolation.

Planar process

Main article: Planar process

See also: Planar transistor

Jean Hoerni attended the same 1958 Electrochemical Society meeting, and was intrigued by Mohamed Atalla's presentation of the surface passivation process. Hoerni came up with the "planar idea" one morning while thinking about Atalla's device. Taking advantage of silicon dioxide's passivating effect on the silicon surface, Hoerni proposed to make transistors that were protected by a layer of silicon dioxide. This led to the first successful product implementation of the Atalla silicon transistor passivation technique by thermal oxide.

Jean Hoerni first proposed a planar technology of bipolar transistors. In this process, all the p-n junctions were covered by a protective layer, which should significantly improve reliability. However, at the time, this proposal was considered technically impossible. The formation of the emitter of an n-p-n transistor required diffusion of phosphorus, and the work of Frosch suggested that SiO₂ does not block such diffusion. In March 1959, Chih-Tang Sah, a former colleague of Hoerni, pointed Hoerni and Noyce to an error in the conclusions of Frosch. Frosch used a thin oxide layer, whereas the experiments of 1957–1958 showed that a thick layer of oxide can stop the phosphorus diffusion.

Armed with the above knowledge, by March 12, 1959, Hoerni made the first prototype of a planar transistor, and on May 1, 1959 filed a patent application for the invention of the planar process. In April 1960, Fairchild launched the planar transistor 2N1613, and by October 1960 completely abandoned the mesa transistor technology. By the mid-1960s, the planar process has become the main technology of producing transistors and monolithic integrated circuits.

Isolation by p-n junction

Further information: P–n junction isolation

Before the development of integrated circuits, discrete diodes and transistors exhibited relatively high reverse-bias junction leakages and low breakdown voltage, caused by the large density of traps at the surface of single crystal silicon. The solution to this problem was the surface passivation process developed by Mohamed Atalla at Bell Telephone Laboratories (BTL). He discovered that when a thin layer of silicon dioxide was grown on the surface of silicon where a p–n junction intercepts the surface, the leakage current of the junction was reduced by a factor from 10 to 100. This showed that the oxide reduces and stabilizes many of the interface and oxide traps. Oxide-passivation of silicon surfaces allowed diodes and transistors to be fabricated with significantly improved device characteristics, while the leakage path along the surface of the silicon was also effectively shut off. This became one of the fundamental isolation capabilities necessary for planar technology and integrated circuits. According to Fairchild Semiconductor engineer Chih-Tang Sah, Atalla's surface passivation method was critical to the development of the silicon integrated circuit.

Atalla first published his surface passivation method in BTL memos during 1957, before presenting his work at a 1958 Electrochemical Society meeting. This became the basis for Jean Hoerni's planar process, which in turn was the basis for Robert Noyce's monolithic integrated circuit.

First integrated circuits

Main article: Invention of the integrated circuit

See also: Planar process, p–n junction isolation, and Surface passivation

Robert Noyce invented the first monolithic integrated circuit in 1959. The chip was made from silicon.

A precursor idea to the IC was to create small ceramic substrates (so-called micromodules), each containing a single miniaturized component. Components could then be integrated and wired into a bidimensional or tridimensional compact grid. This idea, which seemed very promising in 1957, was proposed to the US Army by Jack Kilby and led to the short-lived Micromodule Program (similar to 1951's Project Tinkertoy). However, as the project was gaining momentum, Kilby came up with a new, revolutionary design: the IC.

Newly employed by Texas Instruments, Kilby recorded his initial ideas concerning the integrated circuit in July 1958, successfully demonstrating the first working example of an integrated circuit on 12 September 1958. In his patent application of 6 February 1959, Kilby described his new device as "a body of semiconductor material … wherein all the components of the electronic circuit are completely integrated." The first customer for the new invention was the US Air Force. Kilby won the 2000 Nobel Prize in physics for his part in the invention of the integrated circuit. However, Kilby's invention was a hybrid integrated circuit (hybrid IC), rather than a monolithic integrated circuit (monolithic IC) chip. Kilby's IC had external wire connections, which made it difficult to mass-produce.

Half a year after Kilby, Robert Noyce at Fairchild Semiconductor invented the first true monolithic IC chip. It was a new variety of integrated circuit, more practical than Kilby's implementation. Noyce's design was made of silicon, whereas Kilby's chip was made of germanium. Noyce's monolithic IC put all components on a chip of silicon and connected them with copper lines. Noyce's monolithic IC was fabricated using the planar process, developed in early 1959 by his colleague Jean Hoerni. Modern IC chips are based on Noyce's monolithic IC, rather than Kilby's hybrid IC.

NASA's Apollo Program was the largest single consumer of integrated circuits between 1961 and 1965.

TTL integrated circuits

Main article: Transistor–transistor logic

Transistor–transistor logic (TTL) was developed by James L. Buie in the early 1960s at TRW Inc. TTL became the dominant integrated circuit technology during the 1970s to early 1980s.

Dozens of TTL integrated circuits were a standard method of construction for the processors of minicomputers and mainframe computers. Computers such as IBM 360 mainframes, PDP-11 minicomputers and the desktop Datapoint 2200 were built from bipolar integrated circuits, either TTL or the even faster emitter-coupled logic (ECL).

MOS integrated circuits

Further information: MOS integrated circuit

See also: List of semiconductor scale examples, Mixed-signal integrated circuit, Moore's law, MOS revolution, Three-dimensional integrated circuit, Transistor count, and Very Large Scale Integration

Nearly all modern IC chips are metal–oxide–semiconductor (MOS) integrated circuits, built from MOSFETs (metal–oxide–silicon field-effect transistors). The MOSFET (also known as the MOS transistor), which was invented by Mohamed M. Atalla and Dawon Kahng at Bell Labs in 1959, made it possible to build high-density integrated circuits. Atalla first proposed the concept of the MOS integrated circuit (MOS IC) chip in 1960, noting that the MOSFET's ease of fabrication made it useful for integrated circuits. In contrast to bipolar transistors which required a number of steps for the p–n junction isolation of transistors on a chip, MOSFETs required no such steps but could be easily isolated from each other. Its advantage for integrated circuits was re-iterated by Dawon Kahng in 1961. The list of IEEE milestones includes the first integrated circuit by Kilby in 1958, Hoerni's planar process and Noyce's planar IC in 1959, and the MOSFET by Atalla and Kahng in 1959.

The earliest experimental MOS IC to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA in 1962. General Microelectronics later introduced the first commercial MOS integrated circuit in 1964, a 120-transistor shift register developed by Robert Norman. By 1964, MOS chips had reached higher transistor density and lower manufacturing costs than bipolar chips. MOS chips further increased in complexity at a rate predicted by Moore's law, leading to large-scale integration (LSI) with hundreds of transistors on a single MOS chip by the late 1960s.

Following the development of the self-aligned gate (silicon-gate) MOSFET by Robert Kerwin, Donald Klein and John Sarace at Bell Labs in 1967, the first silicon-gate MOS IC technology with self-aligned gates, the basis of all modern CMOS integrated circuits, was developed at Fairchild Semiconductor by Federico Faggin in 1968. The application of MOS LSI chips to computing was the basis for the first microprocessors, as engineers began recognizing that a complete computer processor could be contained on a single MOS LSI chip. This led to the inventions of the microprocessor and the microcontroller by the early 1970s. During the early 1970s, MOS integrated circuit technology enabled the very large-scale integration (VLSI) of more than 10,000 transistors on a single chip.

At first, MOS-based computers only made sense when high density was required, such as aerospace and pocket calculators. Computers built entirely from TTL, such as the 1970 Datapoint 2200, were much faster and more powerful than single-chip MOS microprocessors such as the 1972 Intel 8008 until the early 1980s.

Advances in IC technology, primarily smaller features and larger chips, have allowed the number of MOS transistors in an integrated circuit to double every two years, a trend known as Moore's law. Moore originally stated it would double every year, but he went on to change the claim to every two years in 1975. This increased capacity has been used to decrease cost and increase functionality. In general, as the feature size shrinks, almost every aspect of an IC's operation improves. The cost per transistor and the switching power consumption per transistor goes down, while the memory capacity and speed go up, through the relationships defined by Dennard scaling (MOSFET scaling). Because speed, capacity, and power consumption gains are apparent to the end user, there is fierce competition among the manufacturers to use finer geometries. Over the years, transistor sizes have decreased from 10s of microns in the early 1970s to 10 nanometers in 2017 with a corresponding million-fold increase in transistors per unit area. As of 2016, typical chip areas range from a few square millimeters to around 600 mm², with up to 25 million transistors per mm².

The expected shrinking of feature sizes and the needed progress in related areas was forecast for many years by the International Technology Roadmap for Semiconductors (ITRS). The final ITRS was issued in 2016, and it is being replaced by the International Roadmap for Devices and Systems.

Initially, ICs were strictly electronic devices. The success of ICs has led to the integration of other technologies, in an attempt to obtain the same advantages of small size and low cost. These technologies include mechanical devices, optics, and sensors.

• Charge-coupled devices, and the closely related active-pixel sensors, are chips that are sensitive to light. They have largely replaced photographic film in scientific, medical, and consumer applications. Billions of these devices are now produced each year for applications such as cellphones, tablets, and digital cameras. This sub-field of ICs won the Nobel Prize in 2009.
• Very small mechanical devices driven by electricity can be integrated onto chips, a technology known as microelectromechanical systems. These devices were developed in the late 1980s and are used in a variety of commercial and military applications. Examples include DLP projectors, inkjet printers, and accelerometers and MEMS gyroscopes used to deploy automobile airbags.
• Since the early 2000s, the integration of optical functionality (optical computing) into silicon chips has been actively pursued in both academic research and in industry resulting in the successful commercialization of silicon based integrated optical transceivers combining optical devices (modulators, detectors, routing) with CMOS based electronics. Integrated optical circuits are also being developed, using the emerging field of physics known as photonics.
• Integrated circuits are also being developed for sensor applications in medical implants or other bioelectronic devices. Special sealing techniques have to be applied in such biogenic environments to avoid corrosion or biodegradation of the exposed semiconductor materials.

As of 2018, the vast majority of all transistors are MOSFETs fabricated in a single layer on one side of a chip of silicon in a flat two-dimensional planar process. Researchers have produced prototypes of several promising alternatives, such as:

• various approaches to stacking several layers of transistors to make a three-dimensional integrated circuit (3DIC), such as through-silicon via, "monolithic 3D", stacked wire bonding, and other methodologies.
• transistors built from other materials: graphene transistors, molybdenite transistors, carbon nanotube field-effect transistor, gallium nitride transistor, transistor-like nanowire electronic devices, organic field-effect transistor, etc.
• fabricating transistors over the entire surface of a small sphere of silicon.
• modifications to the substrate, typically to make "flexible transistors" for a flexible display or other flexible electronics, possibly leading to a roll-away computer.

As it becomes more difficult to manufacture ever smaller transistors, companies are using multi-chip modules, three-dimensional integrated circuits, package on package, High Bandwidth Memory and through-silicon vias to increase performance and reducing size, without having to reduce the size of the transistors. These techniques are collectively known as advanced packaging. Advanced packaging is mainly divided into 2.5D and 3D packaging. 2.5D describes approaches such as multi-chip modules while 3D describes approaches where dies are stacked in one way or another, such as package on package and high bandwidth memory. All approaches involve 2 or more dies in a single package. Alternatively, approaches such as 3D NAND stack multiple layers on a single die.

IC Market

Integrated circuits accounts, as of 2016, for 82% of the entire semiconductor industry's revenue. Digital integrated circuits accounts for 86% of that revenue.

Integration Density

See also: List of semiconductor scale examples, MOS integrated circuit, and Transistor count

In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few transistors, and the low degree of integration meant the design process was relatively simple. Manufacturing yields were also quite low by today's standards. As metal–oxide–semiconductor (MOS) technology progressed, millions and then billions of MOS transistors could be placed on one chip, and good designs required thorough planning, giving rise to the field of electronic design automation, or EDA.

Name	Signification	Year	Transistor count	Logic gates number
SSI	small-scale integration	1964	1 to 10	1 to 12
MSI	medium-scale integration	1968	10 to 500	13 to 99
LSI	large-scale integration	1971	500 to 20 000	100 to 9999
VLSI	very large-scale integration	1980	20 000 to 1 000 000	10 000 to 99 999
ULSI	ultra-large-scale integration	1984	1 000 000 and more	100 000 and more

Small-scale integration (SSI)

The first integrated circuits contained only a few transistors. Early digital circuits containing tens of transistors provided a few logic gates, and early linear ICs such as the Plessey SL201 or the Philips TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased dramatically since then. The term "large scale integration" (LSI) was first used by IBM scientist Rolf Landauer when describing the theoretical concept; that term gave rise to the terms "small-scale integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-large-scale integration" (ULSI). The early integrated circuits were SSI.

SSI circuits were crucial to early aerospace projects, and aerospace projects helped inspire development of the technology. Both the Minuteman missile and Apollo program needed lightweight digital computers for their inertial guidance systems. Although the Apollo guidance computer led and motivated integrated-circuit technology, it was the Minuteman missile that forced it into mass-production. The Minuteman missile program and various other United States Navy programs accounted for the total $4 million integrated circuit market in 1962, and by 1968, U.S. Government spending on space and defense still accounted for 37% of the $312 million total production.

The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough to allow IC firms to penetrate the industrial market and eventually the consumer market. The average price per integrated circuit dropped from $50.00 in 1962 to $2.33 in 1968. Integrated circuits began to appear in consumer products by the turn of the 1970s decade. A typical application was FM inter-carrier sound processing in television receivers.

The first application MOS chips were small-scale integration (SSI) chips. Following Mohamed M. Atalla's proposal of the MOS integrated circuit chip in 1960, the earliest experimental MOS chip to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA in 1962. The first practical application of MOS SSI chips was for NASA satellites.

Medium-scale integration (MSI)

The next step in the development of integrated circuits introduced devices which contained hundreds of transistors on each chip, called "medium-scale integration" (MSI).

MOSFET scaling technology made it possible to build high-density chips. By 1964, MOS chips had reached higher transistor density and lower manufacturing costs than bipolar chips.

In 1964, Frank Wanlass demonstrated a single-chip 16-bit shift register he designed, with a then-incredible 120 MOS transistors on a single chip. The same year, General Microelectronics introduced the first commercial MOS integrated circuit chip, consisting of 120 p-channel MOS transistors. It was a 20-bit shift register, developed by Robert Norman and Frank Wanlass. MOS chips further increased in complexity at a rate predicted by Moore's law, leading to chips with hundreds of MOSFETs on a chip by the late 1960s.

Large-scale integration (LSI)

Main article: Large-scale integration

Further information: MOS integrated circuit

Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.

The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the microprocessors of the early 1970s) were mostly created by hand, often using Rubylith-tape or similar. For large or complex ICs (such as memories or processors), this was often done by specially hired professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would also, along with the circuit designers, inspect and verify the correctness and completeness of each mask.

Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits, approaching 10,000 transistors, began to be produced around 1974, for computer main memories and second-generation microprocessors.

Some SSI and MSI chips, like discrete transistors, are still mass-produced, both to maintain old equipment and build new devices that require only a few gates. The 7400 series of TTL chips, for example, has become a de facto standard and remains in production.

Very-large-scale integration (VLSI)

Main article: Very-large-scale integration

The final step in the development process, starting in the 1980s and continuing through the present, is "very-large-scale integration" (VLSI). The development started with hundreds of thousands of transistors in the early 1980s. As of 2016, transistor counts continue to grow beyond ten billion transistors per chip.

Multiple developments were required to achieve this increased density. Manufacturers moved to smaller MOSFET design rules and cleaner fabrication facilities so that they could make chips with more transistors and maintain adequate yield. The path of process improvements was summarized by the International Technology Roadmap for Semiconductors (ITRS), which has since been succeeded by the International Roadmap for Devices and Systems (IRDS). Electronic design tools improved enough to make it practical to finish these designs in a reasonable time. The more energy-efficient CMOS replaced NMOS and PMOS, avoiding a prohibitive increase in power consumption. Modern VLSI devices contain so many transistors, layers, interconnections, and other features that it is no longer feasible to check the masks or do the original design by hand. Instead, engineers use EDA (electronic design automation) tools to perform most functional verification work.

In 1986 the first one-megabit random-access memory (RAM) chips were introduced, containing more than one million transistors. Microprocessor chips passed the million-transistor mark in 1989 and the billion-transistor mark in 2005. The trend continues largely unabated, with chips introduced in 2007 containing tens of billions of memory transistors.

ULSI, WSI, SoC and 3D-IC

Further information: Wafer-scale integration, System on a chip, and Three-dimensional integrated circuit

To reflect further growth of the complexity, the term ULSI that stands for "ultra-large-scale integration" was proposed for chips of more than 1 million transistors.

Wafer-scale integration (WSI) is a means of building very large integrated circuits that uses an entire silicon wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being developed.

A system-on-a-chip (SoC or SOC) is an integrated circuit in which all the components needed for a computer or other system are included on a single chip. The design of such a device can be complex and costly, and whilst performance benefits can be had from integrating all needed components on one die, the cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced power budget: because signals among the components are kept on-die, much less power is required (see Packaging). Further, signal sources and destinations are physically closer on die, reducing the length of wiring and therefore latency, transmission power costs and waste heat from communication between modules on the same chip. This has led to an exploration of so-called Network-on-Chip (NoC) devices, which apply system-on-chip design methodologies to digital communication networks as opposed to traditional bus architectures.

A three-dimensional integrated circuit (3D-IC) has two or more layers of active electronic components that are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall wire length for faster operation.

See also

• Chipset
• Integrated injection logic
• Ion implantation
• Monolithic microwave integrated circuit
• Multi-threshold CMOS
• Silicon-germanium
• Sound chip
• SPICE
• Chip carrier

Bibliography

• Berlin, L. (2005). The Man Behind the Microchip: Robert Noyce and the Invention of Silicon Valley. Oxford University Press. ISBN 9780199839773.
• (2010) in Lécuyer, C.: Makers of the Microchip: A Documentary History of Fairchild Semiconductor. MIT Press. ISBN 9780262014243.
• Ceruzzi, P. E. (2003). A History of Modern Computing. MIT Press. ISBN 9780262532037.
• Flamm, K (1996). Mismanaged Trade: Strategic Policy and the Semiconductor Industry. Brookings Institution Press. ISBN 9780815728467.
• Hubner, Kurt (1998). Silicon Materials Science and Technology: Proceedings of the Eighth International Symposium on Silicon Materials Science and Technology. The Electrochemical Society, 99–115. ISBN 978-1-56677-193-1.

• Kaplan, F (2010). 1959: The Year Everything Changed. John Wiley & Sons. ISBN 9780470602034.

• Lojek, B (2007). History of semiconductor engineering. Springer. ISBN 9783540342571.
• Saxena, A (2009). Invention of integrated circuits: untold important facts, International series on advances in solid state electronics and technology. World Scientific. ISBN 9789812814456.

Further reading

• Veendrick, H.J.M. (2017). Nanometer CMOS ICs, from Basics to ASICs. Springer. ISBN 978-3-319-47595-0.
• Baker, R.J. (2010). CMOS: Circuit Design, Layout, and Simulation, 3rd, Wiley-IEEE. ISBN 978-0-470-88132-3.
• Marsh, Stephen P. (2006). Practical MMIC design. Artech House. ISBN 978-1-59693-036-0.
• (2005) Designing Analog Chips. Virtual Bookworm. ISBN 978-1-58939-718-7. "Hans Camenzind invented the 555 timer"
• (2003) Analysis and Design of Digital Integrated Circuits. McGraw-Hill. ISBN 978-0-07-228365-5.
• (2003) Digital Integrated Circuits, 2nd, Pearson. ISBN 978-0-13-090996-1.
• (1980) Introduction to VLSI systems. Addison Wesley Publishing Company. ISBN 978-0-201-04358-7.

External links

General

• The first monolithic integrated circuits
• A large chart listing ICs by generic number including access to most of the datasheets for the parts.
• The History of the Integrated Circuit at Nobelprize.org

Integrated circuit die manufacturing

• IC Die Photography – A gallery of IC die photographs
• Zeptobars – Yet another gallery of IC die photographs