From WikiChip
Difference between revisions of "amd/microarchitectures/zen 5"
(+chief architect) |
|||
Line 35: | Line 35: | ||
== See Also == | == See Also == | ||
* AMD {{\\|Zen}} | * AMD {{\\|Zen}} | ||
− | * Intel {{intel| | + | * Intel {{intel|Meteor Lake|l=arch}} |
Revision as of 08:20, 22 February 2021
Edit Values | |
Zen 5 µarch | |
General Info | |
Arch Type | CPU |
Designer | AMD |
Manufacturer | TSMC or Samsung |
Process | 5 nm |
Succession | |
Zen 5 is a planned microarchitecture being developed by AMD as a successor to Zen 4.
Contents
History
Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018[1].
Process Technology
Zen 5 is speculated to be produced on a 5nm process.
Codenames
This section is empty; you can help add the missing info by editing this page. |
Architecture
Nothing is currently known about the architectural improvements that are being done to Zen 5.
Key changes from Zen 4
This section is empty; you can help add the missing info by editing this page. |
Designers
- David Suggs, chief architect
Bibliography
See Also
- AMD Zen
- Intel Meteor Lake
Facts about "Zen 5 - Microarchitectures - AMD"
codename | Zen 5 + |
core count | 256 +, 224 +, 192 +, 144 +, 128 +, 6 +, 72 +, 8 +, 56 +, 48 +, 32 +, 28 +, 36 + and 24 + |
designer | AMD + |
full page name | amd/microarchitectures/zen 5 + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + and AVX512, AMX (Advanced Matrix Extensions) + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Zen 5 + |
processing element count | 512 +, 448 +, 384 +, 288 +, 256 +, 192 +, 144 +, 128 +, 112 +, 96 +, 64 +, 56 +, 60 +, 40 +, 30 + and 20 + |