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Difference between revisions of "amd/epyc/7532"
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{{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}} | {{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}} | ||
{{cache size | {{cache size | ||
− | |l1 cache= | + | |l1 cache=2 MiB |
− | |l1i cache= | + | |l1i cache=1 MiB |
− | |l1i break= | + | |l1i break=32 × 32 KiB |
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |l1d cache= | + | |l1d cache=1 MiB |
− | |l1d break= | + | |l1d break=32 × 32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d policy=write-back | |l1d policy=write-back | ||
− | |l2 cache= | + | |l2 cache=16 MiB |
− | |l2 break= | + | |l2 break=32 × 512 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 policy=write-back | |l2 policy=write-back |
Revision as of 20:59, 8 January 2021
Edit Values | |
EPYC 7532 | |
General Info | |
Designer | AMD |
Manufacturer | TSMC, GlobalFoundries |
Model Number | 7532 |
Part Number | 100-000000136, 100-000000136WOF |
Market | Server |
Introduction | February 19, 2020 (announced) February 19, 2020 (launched) |
Shop | Amazon |
General Specs | |
Family | EPYC |
Series | 7002 |
Locked | Yes |
Frequency | 2,400 MHz |
Turbo Frequency | 3,300 MHz |
Clock multiplier | 24 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 2 |
Core Name | Rome |
Core Family | 23 |
Core Model | 49 |
Core Stepping | B0 |
Process | 7 nm, 14 nm |
Technology | CMOS |
MCP | Yes (9 dies) |
Word Size | 64 bit |
Cores | 32 |
Threads | 64 |
Max Memory | 4 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
TDP | 200 W |
Packaging | |
Package | SP3, FCLGA-4094 (FC-OLGA) |
Dimension | 75.4 mm × 58.5 mm × 6.26 mm |
Pitch | 0.87 mm × 1 mm |
Contacts | 4094 |
Socket | SP3, LGA-4094 |
EPYC 7532 is a 64-bit 48-core x86 server microprocessor designed and introduced by AMD in February 2020. This multi-chip processor, which is based on the Zen 2 microarchitecture, incorporates 8 compute dies fabricated on a TSMC 7 nm process and an I/O die fabricated on a GlobalFoundries 14 nm process. The 7532 has a TDP of 200 W with a base frequency of 2.4 GHz and a boost frequency of up to 3.3 GHz. This processor supports up to two-way SMP and up to 4 TiB of eight channels DDR4-3200 memory per socket.
Cache
- Main article: Zen 2 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Features
[Edit/Modify Supported Features]
References
- "AMD EPYC™ 7532". AMD.com. Retrieved October 2020.
- "AMD EPYC™ 7002 Series Processors: A New Standard for the Modern Datacenter", AMD Publ. #LE-70002, Rev. 02, April 2020
- "Expanding the AMD EPYC™ processor portfolio". AMD.com. Retrieved October 2020.
Facts about "EPYC 7532 - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC 7532 - AMD#pcie + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
clock multiplier | 24 + |
core count | 32 + |
core family | 23 + |
core model | 49 + |
core name | Rome + |
core stepping | B0 + |
designer | AMD + |
die count | 9 + |
family | EPYC + |
first announced | February 19, 2020 + |
first launched | February 19, 2020 + |
full page name | amd/epyc/7532 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd precision boost 2 | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 2,048 KiB (2,097,152 B, 2 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
l3$ size | 256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) + |
ldate | February 19, 2020 + |
manufacturer | TSMC + and GlobalFoundries + |
market segment | Server + |
max cpu count | 2 + |
max memory | 4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) + |
max memory bandwidth | 190.7 GiB/s (195,276.8 MiB/s, 204.763 GB/s, 204,762.566 MB/s, 0.186 TiB/s, 0.205 TB/s) + |
max memory channels | 8 + |
microarchitecture | Zen 2 + |
model number | 7532 + |
name | EPYC 7532 + |
package | SP3 + and FCLGA-4094 + |
part number | 100-000000136 + and 100-000000136WOF + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 7002 + |
smp max ways | 2 + |
socket | SP3 + and LGA-4094 + |
supported memory type | DDR4-3200 + |
tdp | 200 W (200,000 mW, 0.268 hp, 0.2 kW) + |
technology | CMOS + |
thread count | 64 + |
turbo frequency | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |