From WikiChip
Difference between revisions of "amd/ryzen 9/4900h"
< amd‎ | ryzen 9

Line 58: Line 58:
 
|l3 cache=8 MiB
 
|l3 cache=8 MiB
 
|l3 break=2x4 MiB
 
|l3 break=2x4 MiB
 +
}}
 +
 +
== Memory controller ==
 +
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
 +
 +
{{memory controller
 +
|type=DDR4-3200
 +
|type 2=LPDDR4x-4266
 +
|max mem=64 GiB
 +
|controllers=2
 +
|channels=4
 +
|max bandwidth=68.27 GiB/s
 +
|bandwidth schan=17.88 GiB/s
 +
|bandwidth dchan=34.13 GB/s
 +
|bandwidth qchan=68.27 GB/s
 
}}
 
}}

Revision as of 14:18, 9 May 2020

Edit Values
Ryzen 9 4900H
General Info
DesignerAMD
ManufacturerTSMC
Model Number4900H
MarketMobile
IntroductionMarch 16, 2020 (announced)
March 16, 2020 (launched)
ShopAmazon
General Specs
FamilyRyzen 9
Series4000
LockedYes
Frequency3,300 MHz
Turbo Frequency4,400 MHz
Clock multiplier33
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRenoir
Process7 nm
Transistors9,800,000,000
TechnologyCMOS
Die156 mm²
Word Size64 bit
Cores8
Threads16
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP45 W
cTDP down35 W
cTDP up54 W
Tcase0 °C – 105 °C
Packaging
Unknown package "amd,socket_fp6"

Ryzen 9 4900H is a 64-bit octa-core high-end performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process based on AMD's Zen 2 microarchitecture, the 4900H operates at a base frequency of 3.3 GHz with a TDP of 45 W and a Boost frequency of up to 4.4 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4900H integrates a Radeon Vega 8 Graphics operating at up to 1.75 GHz.

This model supports a configurable TDP-down of 35 W and TDP-up of 54 W.

The 4900HS is a lower-power version of this processor, featuring slightly lower base and turbo frequencies.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  2x4 MiB  

Memory controller

This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200, LPDDR4x-4266
Max Mem64 GiB
Controllers2
Channels4
Max Bandwidth68.27 GiB/s
69,908.48 MiB/s
73.304 GB/s
73,304.354 MB/s
0.0667 TiB/s
0.0733 TB/s
Bandwidth
Single 17.88 GiB/s
Double 34.13 GB/s
Quad 68.27 GB/s
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/ryzen_9/4900h&oldid=96862"
Facts about "Ryzen 9 4900H - AMD"
RDF feed
base frequency3,300 MHz (3.3 GHz, 3,300,000 kHz) +
clock multiplier33 +
core count8 +
core nameRenoir +
designerAMD +
die area156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) +
familyRyzen 9 +
first announcedMarch 16, 2020 +
first launchedMarch 16, 2020 +
full page nameamd/ryzen 9/4900h +
has ecc memory supportfalse +
has locked clock multipliertrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateMarch 16, 2020 +
manufacturerTSMC +
market segmentMobile +
max case temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth68.27 GiB/s (69,908.48 MiB/s, 73.304 GB/s, 73,304.354 MB/s, 0.0667 TiB/s, 0.0733 TB/s) +
max memory channels4 +
microarchitectureZen 2 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number4900H +
nameRyzen 9 4900H +
process7 nm (0.007 μm, 7.0e-6 mm) +
series4000 +
smp max ways1 +
supported memory typeDDR4-3200 + and LPDDR4x-4266 +
tdp45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
tdp down35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
tdp up54 W (54,000 mW, 0.0724 hp, 0.054 kW) +
technologyCMOS +
thread count16 +
transistor count9,800,000,000 +
turbo frequency4,400 MHz (4.4 GHz, 4,400,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +