From WikiChip
Difference between revisions of "nervana/nnp/nnp-t 1400"
< nervana‎ | nnp

(nnpt 1400)
 
Line 1: Line 1:
 
{{nervana title|NNP-T 1400}}
 
{{nervana title|NNP-T 1400}}
{{chip}}
+
{{chip
 +
|name=NNP-T 1400
 +
|image=spring crest package (front).png
 +
|back image=spring crest package (back).png
 +
|caption=NPU with 4 HBM2 stacks
 +
|designer=Intel
 +
|manufacturer=TSMC
 +
|model number=NNP-T 1400
 +
|market=Server
 +
|first announced=November 12, 2019
 +
|first launched=November 12, 2019
 +
|family=NNP
 +
|series=NNP-T
 +
|frequency=1,100 MHz
 +
|microarch=Spring Crest
 +
|process=16 nm
 +
|transistors=27,000,000,000
 +
|technology=CMOS
 +
|die area=680 mm²
 +
|core count=24
 +
|max memory=32 GiB
 +
|smp interconnect=InterChip Link
 +
|smp interconnect links=16
 +
|smp interconnect rate=28 GT/s
 +
|power=175 W
 +
|package name 1=intel,fcbga_3325
 +
}}
 
'''NNP-T 1400''' is a [[neural processor]] designed by [[Intel Nervana]] and introduced in late 2019. Fabricated on TSMC [[16 nm process]] based on the {{nervana|Spring Crest|l=arch}} microarchitecture, the NNP-T 1400 has the full 24 {{nervana|Spring Crest#Tensor Processing Cluster (TPC)|TPCs|l=arch}} enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an [[OPC OAM|OAM]] [[accelerator card]] form factor and incorporates 32 GiB of [[HBM2]] memory. This NPU exposes 16 {{nervana|Spring Crest#InterChip Link (ICL)|inter-chip links|l=arch}} for scale-out capabilities.
 
'''NNP-T 1400''' is a [[neural processor]] designed by [[Intel Nervana]] and introduced in late 2019. Fabricated on TSMC [[16 nm process]] based on the {{nervana|Spring Crest|l=arch}} microarchitecture, the NNP-T 1400 has the full 24 {{nervana|Spring Crest#Tensor Processing Cluster (TPC)|TPCs|l=arch}} enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an [[OPC OAM|OAM]] [[accelerator card]] form factor and incorporates 32 GiB of [[HBM2]] memory. This NPU exposes 16 {{nervana|Spring Crest#InterChip Link (ICL)|inter-chip links|l=arch}} for scale-out capabilities.

Revision as of 23:34, 31 January 2020

Edit Values
NNP-T 1400
spring crest package (front).png
NPU with 4 HBM2 stacks
General Info
DesignerIntel
ManufacturerTSMC
Model NumberNNP-T 1400
MarketServer
IntroductionNovember 12, 2019 (announced)
November 12, 2019 (launched)
ShopAmazon
General Specs
FamilyNNP
SeriesNNP-T
Frequency1,100 MHz
Microarchitecture
MicroarchitectureSpring Crest
Process16 nm
Transistors27,000,000,000
TechnologyCMOS
Die680 mm²
Cores24
Max Memory32 GiB
Multiprocessing
InterconnectInterChip Link
Interconnect Links16
Interconnect Rate28 GT/s
Electrical
Power dissipation175 W
Packaging
PackageFCBGA-3325 (FCBGA)
Dimension60 mm × 60 mm
Contacts3325
spring crest package (back).png

NNP-T 1400 is a neural processor designed by Intel Nervana and introduced in late 2019. Fabricated on TSMC 16 nm process based on the Spring Crest microarchitecture, the NNP-T 1400 has the full 24 TPCs enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an OAM accelerator card form factor and incorporates 32 GiB of HBM2 memory. This NPU exposes 16 inter-chip links for scale-out capabilities.

back imageFile:spring crest package (back).png +
base frequency1,100 MHz (1.1 GHz, 1,100,000 kHz) +
core count24 +
designerIntel +
die area680 mm² (1.054 in², 6.8 cm², 680,000,000 µm²) +
familyNNP +
first announcedNovember 12, 2019 +
first launchedNovember 12, 2019 +
full page namenervana/nnp/nnp-t 1400 +
instance ofmicroprocessor +
ldateNovember 12, 2019 +
main imageFile:spring crest package (front).png +
main image captionNPU with 4 HBM2 stacks +
manufacturerTSMC +
market segmentServer +
max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
microarchitectureSpring Crest +
model numberNNP-T 1400 +
nameNNP-T 1400 +
packageFCBGA-3325 +
power dissipation175 W (175,000 mW, 0.235 hp, 0.175 kW) +
process16 nm (0.016 μm, 1.6e-5 mm) +
seriesNNP-T +
smp interconnectInterChip Link +
smp interconnect links16 +
smp interconnect rate28 GT/s +
technologyCMOS +
transistor count27,000,000,000 +