From WikiChip
Difference between revisions of "amd/ryzen threadripper/3960x"
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'''Ryzen Threadripper 3960X''' is a {{arch|64}} [[tetracosa-core]] high-performance [[x86]] desktop [[microprocessor]] introduced by [[AMD]] in late [[2019]]. The 3960X, which is based on their {{amd|Zen 2|Zen+ microarchitecture|l=arch}}, is fabricated on [[TSMC]]'s [[7 nm process]]. The 3960X operates at a base frequency of 3.8 GHz with a [[TDP]] of 280 W and a {{amd|precision boost|boost}} of up to 4.5 GHz. This MPU supports up to ? TiB of quad-channel DDR4-3200 memory. | '''Ryzen Threadripper 3960X''' is a {{arch|64}} [[tetracosa-core]] high-performance [[x86]] desktop [[microprocessor]] introduced by [[AMD]] in late [[2019]]. The 3960X, which is based on their {{amd|Zen 2|Zen+ microarchitecture|l=arch}}, is fabricated on [[TSMC]]'s [[7 nm process]]. The 3960X operates at a base frequency of 3.8 GHz with a [[TDP]] of 280 W and a {{amd|precision boost|boost}} of up to 4.5 GHz. This MPU supports up to ? TiB of quad-channel DDR4-3200 memory. | ||
+ | |||
+ | |||
+ | == Cache == | ||
+ | {{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=1.5 MiB | ||
+ | |l1i cache=768 KiB | ||
+ | |l1i break=24x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=768 KiB | ||
+ | |l1d break=24x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l2 cache=12 MiB | ||
+ | |l2 break=24x512 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=128 MiB | ||
+ | |l3 break=8x16 MiB | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR4-3200 | ||
+ | |ecc=Yes | ||
+ | |max mem=? TiB | ||
+ | |controllers=4 | ||
+ | |channels=4 | ||
+ | |max bandwidth=95.37 GiB/s | ||
+ | |bandwidth schan=23.84 GiB/s | ||
+ | |bandwidth dchan=47.68 GiB/s | ||
+ | |bandwidth qchan=95.37 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=4.0 | ||
+ | |pcie lanes=64 | ||
+ | |pcie config=3x16+4x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=Yes | ||
+ | |sse_gfni=No | ||
+ | |avx=Yes | ||
+ | |avx_gfni=No | ||
+ | |avx2=Yes | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |avx512gfni=No | ||
+ | |avx512vaes=No | ||
+ | |avx512vbmi2=No | ||
+ | |avx512bitalg=No | ||
+ | |avx512vpclmulqdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |tvb=No | ||
+ | |bpt=No | ||
+ | |eist=No | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=Yes | ||
+ | |amdv=Yes | ||
+ | |amdsme=No | ||
+ | |amdtsme=Yes | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=Yes | ||
+ | |sensemi=Yes | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=Yes | ||
+ | |amdpbod=No | ||
+ | }} |
Revision as of 00:52, 8 November 2019
Edit Values | |
Ryzen Threadripper 3960X | |
General Info | |
Designer | AMD |
Manufacturer | TSMC, GlobalFoundries |
Model Number | 3960X |
Part Number | 100-000000010 |
Market | Desktop |
Introduction | November 7, 2019 (announced) November 25, 2019 (launched) |
Release Price | $1,399.00 |
Shop | Amazon |
General Specs | |
Family | Ryzen Threadripper |
Series | 3900 |
Locked | No |
Frequency | 3,800 MHz |
Turbo Frequency | 4,500 MHz |
Bus rate | 8 × 16 GT/s |
Clock multiplier | 38 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 2 |
Chipset | TRX40 |
Core Name | Castle Peak |
Process | 7 nm, 12 nm |
Transistors | 23,540,000,000 |
Technology | CMOS |
MCP | Yes (5 dies) |
Word Size | 64 bit |
Cores | 24 |
Threads | 48 |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 280 W |
Tjunction | 0 °C – 68 °C |
Succession | |
Ryzen Threadripper 3960X is a 64-bit tetracosa-core high-performance x86 desktop microprocessor introduced by AMD in late 2019. The 3960X, which is based on their Zen+ microarchitecture, is fabricated on TSMC's 7 nm process. The 3960X operates at a base frequency of 3.8 GHz with a TDP of 280 W and a boost of up to 4.5 GHz. This MPU supports up to ? TiB of quad-channel DDR4-3200 memory.
Contents
Cache
- Main article: Zen 2 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Ryzen Threadripper 3960X - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen Threadripper 3960X - AMD#pcie + |
base frequency | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
bus links | 8 + |
bus rate | 16,000 MT/s (16 GT/s, 16,000,000 kT/s) + |
chipset | TRX40 + |
clock multiplier | 38 + |
core count | 24 + |
core family | 23 + |
core model | 49 + |
core name | Castle Peak + |
core stepping | B0 + |
cpuid | 0x00830F10 + |
designer | AMD + |
die count | 5 + |
family | Ryzen Threadripper + |
first announced | November 7, 2019 + |
first launched | November 25, 2019 + |
full page name | amd/ryzen threadripper/3960x + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd precision boost 2 | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 + |
has locked clock multiplier | false + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) + |
ldate | November 25, 2019 + |
manufacturer | TSMC + and GlobalFoundries + |
market segment | Desktop + |
max cpu count | 1 + |
max junction temperature | 341.15 K (68 °C, 154.4 °F, 614.07 °R) + |
max memory | 262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) + |
max memory bandwidth | 95.37 GiB/s (97,658.88 MiB/s, 102.403 GB/s, 102,402.758 MB/s, 0.0931 TiB/s, 0.102 TB/s) + |
max memory channels | 4 + |
max sata ports | 16 + |
max usb ports | 4 + |
microarchitecture | Zen 2 + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 3960X + |
name | Ryzen Threadripper 3960X + |
package | sTRX4 + and FCLGA-4094 + |
part number | 100-000000010 + and 100-100000010WOF + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |
release price | $ 1,399.00 (€ 1,259.10, £ 1,133.19, ¥ 144,558.67) + |
series | 3900 + |
smp max ways | 1 + |
socket | sTRX4 + |
supported memory type | DDR4-3200 + |
tdp | 280 W (280,000 mW, 0.375 hp, 0.28 kW) + |
tdp (typical) | 267 W (267,000 mW, 0.358 hp, 0.267 kW) + |
technology | CMOS + |
thread count | 48 + |
transistor count | 23,540,000,000 + |
turbo frequency | 4,500 MHz (4.5 GHz, 4,500,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |