Semiconductor & Computer Engineering
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WikiChip
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Architectures
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Intel
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From WikiChip
Difference between revisions of "Template:interconnect arch"
| Line 17: | Line 17: | ||
* [[ccix|CCIX]] | * [[ccix|CCIX]] | ||
* {{cavium|CCPI}} | * {{cavium|CCPI}} | ||
| + | * {{ibm|DMI}} (IBM) | ||
| + | * {{intel|DMI}} (Intel) | ||
* [[extended industry standard architecture|EISA]] | * [[extended industry standard architecture|EISA]] | ||
* [[Gen-Z]] | * [[Gen-Z]] | ||
Revision as of 15:29, 3 November 2019
| v · d · e | |
| Interconnect Architectures | |
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| Concepts | |
| General | |
| Peripheral | |
| Storage Devices | |
| Audio Devices | |