From WikiChip
Difference between revisions of "intel/core i3/i3-1005g1"
| Line 40: | Line 40: | ||
This model supports a configurable TDP of TDP-up of 25 W. | This model supports a configurable TDP of TDP-up of 25 W. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|intel/microarchitectures/ice lake (client)#Memory_Hierarchy|l1=Ice Lake § Cache}} | ||
| + | {{cache size | ||
| + | |l1 cache=160 KiB | ||
| + | |l1i cache=64 KiB | ||
| + | |l1i break=2x32 KiB | ||
| + | |l1i desc=8-way set associative | ||
| + | |l1d cache=96 KiB | ||
| + | |l1d break=2x48 KiB | ||
| + | |l1d desc=12-way set associative | ||
| + | |l1d policy=write-back | ||
| + | |l2 cache=1 MiB | ||
| + | |l2 break=2x512 KiB | ||
| + | |l2 desc=8-way set associative | ||
| + | |l2 policy=write-back | ||
| + | |l3 cache=4 MiB | ||
| + | |l3 break=2x2 MiB | ||
| + | |l3 desc=16-way set associative | ||
| + | |l3 policy=write-back | ||
| + | }} | ||
Revision as of 10:37, 1 August 2019
| Edit Values | |
| Core i3-1005G1 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | i3-1005G1 |
| Market | Mobile |
| Introduction | August 1, 2019 (announced) August 1, 2019 (launched) |
| Release Price | $281.00 (tray) |
| Shop | Amazon |
| General Specs | |
| Family | Core i3 |
| Series | i7-10000 |
| Locked | Yes |
| Frequency | 1,200 MHz |
| Turbo Frequency | 3,400 MHz (1 core), 3,400 MHz (2 cores) |
| Bus type | OPI |
| Bus rate | 4 × 4 GT/s |
| Clock multiplier | 12 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Ice Lake (Client) |
| Platform | Ice Lake |
| Core Name | Sunny Cove |
| Core Family | 6 |
| Process | 10 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 2 |
| Threads | 4 |
| Max Memory | 64 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 15 W |
| Packaging | |
| Package | FCBGA-1510 (BGA) |
| Contacts | 1510 |
Core i3-1005G1 is a 64-bit dual-core low-end performance x86 mobile microprocessor introduced by Intel in mid-2019. This processor, which is based on the Ice Lake microarchitecture, is manufactured on Intel's 2nd generation enhanced 10nm+ process. The i3-1005G1 operates at 1.2 GHz with a TDP of 15 W and Turbo Boost frequency of up to 3.4 GHz. This chip supports up to 64 GiB of quad-channel LPDDR4X-3733 memory and incorporates Intel's GPU with a burst frequency of 1.1 GHz.
This model supports a configurable TDP of TDP-up of 25 W.
Cache
- Main article: Ice Lake § Cache
|
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||||||
Facts about "Core i3-1005G1 - Intel"
| back image | |
| base frequency | 1,200 MHz (1.2 GHz, 1,200,000 kHz) + |
| bus links | 4 + |
| bus rate | 4,000 MT/s (4 GT/s, 4,000,000 kT/s) + |
| bus type | OPI + |
| clock multiplier | 12 + |
| core count | 2 + |
| core family | 6 + |
| core name | Sunny Cove + |
| designer | Intel + |
| family | Core i3 + |
| first announced | August 1, 2019 + |
| first launched | August 1, 2019 + |
| full page name | intel/core i3/i3-1005g1 + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| ldate | August 1, 2019 + |
| main image | |
| manufacturer | Intel + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
| microarchitecture | Ice Lake (Client) + |
| model number | i3-1005G1 + |
| name | Core i3-1005G1 + |
| package | FCBGA-1510 + |
| platform | Ice Lake + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| release price | $ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) + |
| release price (tray) | $ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) + |
| series | i7-10000 + |
| smp max ways | 1 + |
| tdp | 15 W (15,000 mW, 0.0201 hp, 0.015 kW) + |
| technology | CMOS + |
| thread count | 4 + |
| turbo frequency (1 core) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
| turbo frequency (2 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |