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Difference between revisions of "intel/core i3/i3-1005g1"
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This model supports a configurable TDP of TDP-up of 25 W.
 
This model supports a configurable TDP of TDP-up of 25 W.
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== Cache ==
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{{main|intel/microarchitectures/ice lake (client)#Memory_Hierarchy|l1=Ice Lake § Cache}}
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{{cache size
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|l1 cache=160 KiB
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|l1i cache=64 KiB
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|l1i break=2x32 KiB
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|l1i desc=8-way set associative
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|l1d cache=96 KiB
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|l1d break=2x48 KiB
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|l1d desc=12-way set associative
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|l1d policy=write-back
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|l2 cache=1 MiB
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|l2 break=2x512 KiB
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|l2 desc=8-way set associative
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|l2 policy=write-back
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|l3 cache=4 MiB
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|l3 break=2x2 MiB
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|l3 desc=16-way set associative
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|l3 policy=write-back
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}}

Revision as of 10:37, 1 August 2019

Edit Values
Core i3-1005G1
ice lake u (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi3-1005G1
MarketMobile
IntroductionAugust 1, 2019 (announced)
August 1, 2019 (launched)
Release Price$281.00 (tray)
ShopAmazon
General Specs
FamilyCore i3
Seriesi7-10000
LockedYes
Frequency1,200 MHz
Turbo Frequency3,400 MHz (1 core),
3,400 MHz (2 cores)
Bus typeOPI
Bus rate4 × 4 GT/s
Clock multiplier12
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureIce Lake (Client)
PlatformIce Lake
Core NameSunny Cove
Core Family6
Process10 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads4
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP15 W
Packaging
PackageFCBGA-1510 (BGA)
Contacts1510
ice lake u (back).png

Core i3-1005G1 is a 64-bit dual-core low-end performance x86 mobile microprocessor introduced by Intel in mid-2019. This processor, which is based on the Ice Lake microarchitecture, is manufactured on Intel's 2nd generation enhanced 10nm+ process. The i3-1005G1 operates at 1.2 GHz with a TDP of 15 W and Turbo Boost frequency of up to 3.4 GHz. This chip supports up to 64 GiB of quad-channel LPDDR4X-3733 memory and incorporates Intel's GPU with a burst frequency of 1.1 GHz.

This model supports a configurable TDP of TDP-up of 25 W.

Cache

Main article: Ice Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$160 KiB
163,840 B
0.156 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$96 KiB
98,304 B
0.0938 MiB
2x48 KiB12-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB8-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-1005g1&oldid=92603"
Facts about "Core i3-1005G1 - Intel"
RDF feed
back imageFile:ice lake u (back).png +
base frequency1,200 MHz (1.2 GHz, 1,200,000 kHz) +
bus links4 +
bus rate4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus typeOPI +
clock multiplier12 +
core count2 +
core family6 +
core nameSunny Cove +
designerIntel +
familyCore i3 +
first announcedAugust 1, 2019 +
first launchedAugust 1, 2019 +
full page nameintel/core i3/i3-1005g1 +
has locked clock multipliertrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size160 KiB (163,840 B, 0.156 MiB) +
l1d$ description12-way set associative +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateAugust 1, 2019 +
main imageFile:ice lake u (front).png +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
microarchitectureIce Lake (Client) +
model numberi3-1005G1 +
nameCore i3-1005G1 +
packageFCBGA-1510 +
platformIce Lake +
process10 nm (0.01 μm, 1.0e-5 mm) +
release price$ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) +
release price (tray)$ 281.00 (€ 252.90, £ 227.61, ¥ 29,035.73) +
seriesi7-10000 +
smp max ways1 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)3,400 MHz (3.4 GHz, 3,400,000 kHz) +
turbo frequency (2 cores)3,400 MHz (3.4 GHz, 3,400,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +