From WikiChip
Difference between revisions of "phytium/feiteng/ft-2000-64"
< phytium‎ | feiteng

(FT-2000/64)
(No difference)

Revision as of 13:06, 26 March 2019

Edit Values
FT-2000+/64
General Info
DesignerPhytium
ManufacturerTSMC
Model NumberFT-2000/64
MarketServer
Introduction2016 (announced)
2017 (launched)
General Specs
FamilyFeiTeng
SeriesFT-2000+
Frequency2,000 MHz
Microarchitecture
ISAARMv8.0 (ARM)
MicroarchitectureMars I
Core NameFTC-660
Process28 nm
TechnologyCMOS
Die639.576 mm²
Word Size64 bit
Electrical
TDP120 W
Succession

FT-2000/64 is a 64 core ARM server SoC designed by Phytium and introduced in 2017. Fabricated on TSMC's 28 nm process, the chip operates at up 2.0 GHz with a TDP of 120 W. This chip is designed for server, communication, and infrastructure applications.

Cache

Main article: Mars I § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$4 MiB
4,096 KiB
4,194,304 B
L1I$2 MiB
2,048 KiB
2,097,152 B
64x32 KiB  
L1D$2 MiB
2,048 KiB
2,097,152 B
64x32 KiB  
L2$32 MiB
32,768 KiB
33,554,432 B
0.0313 GiB
  16x2 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1600
Supports ECCYes
Controllers8
Channels8
Max Bandwidth95.37 GiB/s
97,658.88 MiB/s
102.403 GB/s
102,402.758 MB/s
0.0931 TiB/s
0.102 TB/s
Bandwidth
Single 11.92 GiB/s
Double 23.84 GiB/s
Quad 47.68 GiB/s
Hexa 95.37 GiB/s
Octa 71.53 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes33
Configs4x8+x1
Retrieved from "https://en.wikichip.org/w/index.php?title=phytium/feiteng/ft-2000-64&oldid=87368"
Facts about "FT-2000/64 - Phytium"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
FT-2000/64 - Phytium#io +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
core nameFTC-660 +
designerPhytium +
die area639.576 mm² (0.991 in², 6.396 cm², 639,576,000 µm²) +
familyFeiTeng +
first announced2016 +
first launched2017 +
full page namephytium/feiteng/ft-2000-64 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.0 +
isa familyARM +
l1$ size4,096 KiB (4,194,304 B, 4 MiB) +
l1d$ size2,048 KiB (2,097,152 B, 2 MiB) +
l1i$ size2,048 KiB (2,097,152 B, 2 MiB) +
l2$ size32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldate2017 +
manufacturerTSMC +
market segmentServer +
max memory bandwidth95.37 GiB/s (97,658.88 MiB/s, 102.403 GB/s, 102,402.758 MB/s, 0.0931 TiB/s, 0.102 TB/s) +
max memory channels8 +
max pcie lanes33 +
microarchitectureMars I +
model numberFT-2000/64 +
nameFT-2000+/64 +
process28 nm (0.028 μm, 2.8e-5 mm) +
seriesFT-2000+ +
supported memory typeDDR3-1600 +
tdp120 W (120,000 mW, 0.161 hp, 0.12 kW) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +