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FT-2000/64
General Info
Designer	Phytium
Manufacturer	TSMC
Model Number	FT-2000/64
Market	Server
Introduction	2016 (announced) 2017 (launched)
General Specs
Family	FeiTeng
Series	FT-2000
Frequency	2,000 MHz
Microarchitecture
ISA	ARMv8.0 (ARM)
Microarchitecture	Mars I, Xiaomi
Core Name	FTC-660
Process	28 nm
Transistors	4,800,000,000
Technology	CMOS
Die	639.576 mm²
Word Size	64 bit
Cores	64
Threads	64
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	120 W
Succession
FT-2000+/64

FT-2000/64 is a 64 core ARM server SoC designed by Phytium and introduced in 2017. Fabricated on TSMC's 28 nm process, the chip operates at up 2.0 GHz with a TDP of 120 W. This chip is designed for server, communication, and infrastructure applications.

Cache

Main article: Mars I § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 4 MiB 4,096 KiB 4,194,304 B L1I$ 2 MiB 2,048 KiB 2,097,152 B 64x32 KiB     L1D$ 2 MiB 2,048 KiB 2,097,152 B 64x32 KiB     L2$ 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB     16x2 MiB

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3-1600 Supports ECC Yes Controllers 8 Channels 8 Max Bandwidth 95.37 GiB/s 97,658.88 MiB/s 102.403 GB/s 102,402.758 MB/s 0.0931 TiB/s 0.102 TB/s Bandwidth Single 11.92 GiB/s Double 23.84 GiB/s Quad 47.68 GiB/s Hexa 95.37 GiB/s Octa 71.53 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 3.0 Max Lanes 33 Configs 4x8+x1