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'''Cortex-A15''' (codename '''Eagle''') is the successor to the {{armh|Cortex-A9|l=arch}}, a low-power high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. The A15 is the first microarchitecture specifically designed for high-performance, whereas the {{\\|Cortex-A7}}, also the successor to the {{\\|Cortex-A9}}, target high-efficiency.
 
'''Cortex-A15''' (codename '''Eagle''') is the successor to the {{armh|Cortex-A9|l=arch}}, a low-power high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. The A15 is the first microarchitecture specifically designed for high-performance, whereas the {{\\|Cortex-A7}}, also the successor to the {{\\|Cortex-A9}}, target high-efficiency.
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== Compiler support ==
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{| class="wikitable"
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|-
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! Compiler !! Arch-Specific || Arch-Favorable
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|-
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| [[Arm Compiler]] || <code>-mcpu=cortex-a15</code> || <code>-mtune=cortex-a15</code>
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|-
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| [[GCC]] || <code>-mcpu=cortex-a15</code> || <code>-mtune=cortex-a15</code>
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|-
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| [[LLVM]] || <code>-mcpu=cortex-a15</code> || <code>-mtune=cortex-a15</code>
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|}
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One can specify {{arm|NEON}} support using the <code>-mfpu=neon</code> option. Note that GCC will not generate floating-point operations for auto-vectorization constructs because [[NEON]], under [[ARMv7]], is not fully [[IEEE 754]]-compliant. It's possible to use <code>-funsafe-math-optimizations</code> to circumvent that behavior.
  
 
== Architecture ==
 
== Architecture ==

Revision as of 13:31, 31 December 2018

Edit Values
Cortex-A15 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionSeptember 8, 2010
Instructions
ISAARMv7
Succession

Cortex-A15 (codename Eagle) is the successor to the Cortex-A9, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The A15 is the first microarchitecture specifically designed for high-performance, whereas the Cortex-A7, also the successor to the Cortex-A9, target high-efficiency.

Compiler support

Compiler Arch-Specific Arch-Favorable
Arm Compiler -mcpu=cortex-a15 -mtune=cortex-a15
GCC -mcpu=cortex-a15 -mtune=cortex-a15
LLVM -mcpu=cortex-a15 -mtune=cortex-a15

One can specify NEON support using the -mfpu=neon option. Note that GCC will not generate floating-point operations for auto-vectorization constructs because NEON, under ARMv7, is not fully IEEE 754-compliant. It's possible to use -funsafe-math-optimizations to circumvent that behavior.

Architecture

Key changes from Cortex-A9

This list is incomplete; you can help by expanding it.

Block Diagram

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Memory Hierarchy

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Licensees

Arm named the following companies as licensees.

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Facts about "Cortex-A15 - Microarchitectures - ARM"
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codenameCortex-A15 +
designerARM Holdings +
first launchedSeptember 8, 2010 +
full page namearm holdings/microarchitectures/cortex-a15 +
instance ofmicroarchitecture +
instruction set architectureARMv7 +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A15 +