From WikiChip
Difference between revisions of "samsung/exynos/9820"
< samsung‎ | exynos

(Created page with "Exynos 9820 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung in late 2018 and introduced in early 2019 as a successor to the Exynos 9810....")
 
Line 1: Line 1:
−
Exynos 9820 is a 64-bit octa-core ARM high performance mobile system on a chip
+
{{samsung title|Exynos 9820}}
−
designed by Samsung in late 2018 and introduced in early 2019 as a successor to the Exynos 9810.
+
{{chip
−
The processor is fabricated on Samsung's 8 nm LPP (Low Power Plus) FinFET process
+
|name=Exynos 9820
−
and features 8 cores in a tri-cluster configuration consisting of 2 Mongoose M4,
+
|image=exynos 9820.png
−
2 ARM Cortex-A75 and 4 Cortex-A55 little cores.
+
|designer=Samsung
−
The chip supports up to 11.6 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a Mali-G76 MP12 GPU.
+
|designer 2=ARM Holdings
−
The 9820 incorporates an LTE modem supporting cat 20 8CA 2Gbps download and cat 20 3CA 316 Mbps upload.
+
|manufacturer=Samsung
 +
|model number=9820
 +
|market=Mobile
 +
|first announced=November 14, 2018
 +
|first launched=January, 2019
 +
|family=Exynos
 +
|series=Exynos 9
 +
|frequency=
 +
|frequency 2=
 +
|isa=ARMv8.2
 +
|isa family=ARM
 +
|isa 2=ARMv8.0
 +
|isa 2 family=ARM
 +
|microarch=Mongoose M4
 +
|microarch 2=Cortex-A75
 +
|microarch 3=Cortex-A55
 +
|core name=Mongoose M4
 +
|core name 2=Cortex-A75
 +
|core name 3=Cortex-A55
 +
|process=8 nm
 +
|technology=CMOS
 +
|word size=64 bit
 +
|core count=8
 +
|thread count=8
 +
|max cpus=1
 +
}}
 +
'''Exynos 9820''' is a {{arch|64}} [[octa-core]] [[ARM]] high performance mobile [[system on a chip]] designed by [[Samsung]] and introduced in early [[2019]]. The processor is fabricated on Samsung's [[8 nm process]] LPP (Low Power Plus) FinFET process and features [[8 cores]] in a tri-cluster configuration consisting of 2 {{samsung|Mongoose M4|l=arch}} [[big cores]] and 2 {{armh|Cortex-A55|l=arch}} [[big cores]] and 4 Cortex-A55 [[little cores]]. This chip supports up to 11.6 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a {{armh|Mali-G76}} MP12 GPU. The 9820 incorporates an LTE modem supporting cat 20 download and upload.
 +
 
 +
 
 +
{{unknown features}}
 +
 
 +
 
 +
== Cache ==
 +
{{main|samsung/microarchitectures/mongoose_M4#Memory_Hierarchy|arm_holdings/microarchitectures/cortex-a76#Memory_Hierarchy|l1=Mongoose M4 § Cache||l2=Cortex-A76 § Cache}}
 +
For the {{samsung|Mongoose M4|l=arch}} core cluster:
 +
{{cache size
 +
|l1 cache=
 +
|l1i cache=
 +
|l1i break=
 +
|l1i desc=
 +
|l1d cache=
 +
|l1d break=
 +
|l1d desc=
 +
|l2 cache=
 +
|l2 break=
 +
|l2 desc=
 +
|l3 cache=
 +
|l3 break=
 +
}}
 +
 
 +
For the {{armh|Cortex-A75|l=arch}} cluster:
 +
 
 +
{{cache size
 +
|l1 cache=
 +
|l1i cache=
 +
|l1i break=
 +
|l1i desc=
 +
|l1d cache=
 +
|l1d break=
 +
|l1d desc=
 +
|l2 cache=
 +
|l2 break=
 +
|l2 desc=
 +
}}
 +
 
 +
 
 +
For the {{armh|Cortex-A55|l=arch}} cluster:
 +
 
 +
{{cache size
 +
|l1 cache=
 +
|l1i cache=
 +
|l1i break=
 +
|l1i desc=
 +
|l1d cache=
 +
|l1d break=
 +
|l1d desc=
 +
|l2 cache=
 +
|l2 break=
 +
|l2 desc=
 +
}}
 +
 
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR4X-3600
 +
|ecc=No
 +
|max mem=11.6 GiB
 +
|controllers=4
 +
|channels=4
 +
|width=16 bit
 +
|frequency=1800 MHz
 +
|bandwidth schan=
 +
|bandwidth dchan=
 +
}}
 +
 
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = Mali-G76
 +
| device id          =
 +
| designer            = ARM Holdings
 +
| execution units    = 12
 +
| max displays        = 2
 +
| max memory          =
 +
| frequency          = 600 MHz
 +
| max frequency      =
 +
 
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          = Yes
 +
| output edp          =
 +
| output dp          =
 +
| output hdmi        =
 +
| output vga          =
 +
| output dvi          =
 +
 
 +
| directx ver        = 12
 +
| opengl ver        =
 +
| opengl es ver      = 3.2
 +
| openvg ver        = 1.1
 +
| opencl ver        = 2
 +
| vulkan ver        = 1.0
 +
| hdmi ver          =
 +
| dp ver            =
 +
| edp ver            =
 +
| max res hdmi      =
 +
| max res hdmi freq  =
 +
| max res dp        =
 +
| max res dp freq    =
 +
| max res edp        =
 +
| max res edp freq  =
 +
| max res vga        =
 +
| max res vga freq  =
 +
}}
 +
 
 +
 
 +
{| class=wikitable
 +
|-
 +
! Codec !! Encode !! Decode
 +
|-
 +
| [[HEVC]] (H.265) || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
| [[MPEG-4 AVC]] (H.264) || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
| [[VP9]] || {{tchk|yes}} || {{tchk|yes}}
 +
|-
 +
|}
 +
 
 +
All at 4K UHD 150fps.
 +
 
 +
== Wireless ==
 +
{{wireless links
 +
| 2g                =
 +
| csd              =
 +
| gsm              =
 +
| gprs              =
 +
| edge              =
 +
| cdmaone          =
 +
| is-95a            =
 +
| is-95b            =
 +
| 3g                =
 +
| cdma2000          =
 +
| cdma2000 1x      =
 +
| cdma2000 1xev-do  =
 +
| cdma2000 1x adv  =
 +
| umts              =
 +
| wcdma            = 
 +
| td-scdma          =
 +
| dc-hsdpa          =
 +
| hsdpa            =
 +
| hsupa            =
 +
| 4g                = Yes
 +
| lte a            = Yes
 +
| e-utran          =
 +
| ue cat dl        = 20
 +
| ue cat dl rate    = 2000 Mbps
 +
| ue cat ul        = 20
 +
| ue cat ul rate    = 316 Mbps
 +
}}
 +
 
 +
== ISP ==
 +
* 24MP Rear
 +
* 24MP Front
 +
* 16MP+16MP Dual
 +
 
 +
== Features ==
 +
{{arm features
 +
|thumb=No
 +
|thumb2=No
 +
|thumbee=No
 +
|vfpv1=No
 +
|vfpv2=No
 +
|vfpv3=No
 +
|vfpv3-d16=No
 +
|vfpv3-f16=No
 +
|vfpv4=No
 +
|vfpv4-d16=No
 +
|vfpv5=No
 +
|neon=Yes
 +
|trustzone=No
 +
|jazelle=No
 +
|wmmx=No
 +
|wmmx2=No
 +
|pmuv3=No
 +
|crc32=Yes
 +
|crypto=Yes
 +
|fp=Yes
 +
|fp16=No
 +
|profile=No
 +
|ras=No
 +
|simd=No
 +
|rdm=No
 +
}}
 +
 
 +
== Utilizing devices ==
 +
* [[used by::Samsung Galaxy S10]]
 +
{{expand list}}

Revision as of 10:22, 9 December 2018

Edit Values
Exynos 9820
200px
General Info
DesignerSamsung,
ARM Holdings
ManufacturerSamsung
Model Number9820
MarketMobile
IntroductionNovember 14, 2018 (announced)
January, 2019 (launched)
General Specs
FamilyExynos
SeriesExynos 9
Microarchitecture
ISAARMv8.2 (ARM), ARMv8.0 (ARM)
MicroarchitectureMongoose M4, Cortex-A75, Cortex-A55
Core NameMongoose M4, Cortex-A75, Cortex-A55
Process8 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Multiprocessing
Max SMP1-Way (Uniprocessor)

Exynos 9820 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in early 2019. The processor is fabricated on Samsung's 8 nm process LPP (Low Power Plus) FinFET process and features 8 cores in a tri-cluster configuration consisting of 2 Mongoose M4 big cores and 2 Cortex-A55 big cores and 4 Cortex-A55 little cores. This chip supports up to 11.6 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a Mali-G76 MP12 GPU. The 9820 incorporates an LTE modem supporting cat 20 download and upload.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main articles: Mongoose M4 § Cache and Cortex-A76 § Cache

For the Mongoose M4 core cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

For the Cortex-A75 cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.


For the Cortex-A55 cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.


Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-3600
Supports ECCNo
Max Mem11.6 GiB
Frequency1800 MHz
Controllers4
Channels4
Width16 bit

Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-G76
DesignerARM Holdings
Execution Units12Max Displays2
Frequency600 MHz
0.6 GHz
600,000 KHz
OutputDSI
Standards
DirectX12
OpenCL2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0


Codec Encode Decode
HEVC (H.265) ✔ ✔
MPEG-4 AVC (H.264) ✔ ✔
VP9 ✔ ✔

All at 4K UHD 150fps.

Wireless

Antu network-wireless-connected-100.svgWireless Communications
Cellular
4G
LTE Advanced
UE Cat DL20 (2000 Mbps)
UE Cat UL20 (316 Mbps)

ISP

  • 24MP Rear
  • 24MP Front
  • 16MP+16MP Dual

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported ARM Extensions & Processor Features
NEONAdvanced SIMD extension
CRC32CRC-32 checksum Extension
CryptoCryptographic Extension
FPFloating-point Extension

Utilizing devices

  • Samsung Galaxy S10

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=samsung/exynos/9820&oldid=84837"
Facts about "Exynos 9820 - Samsung"
RDF feed
core count8 +
core nameMongoose M4 +, Cortex-A75 + and Cortex-A55 +
designerSamsung + and ARM Holdings +
familyExynos +
first announcedNovember 14, 2018 +
first launchedJanuary 2019 +
full page namesamsung/exynos/9820 +
has 4g supporttrue +
has ecc memory supportfalse +
has lte advanced supporttrue +
instance ofmicroprocessor +
integrated gpuMali-G76 +
integrated gpu base frequency600 MHz (0.6 GHz, 600,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units12 +
isaARMv8.2 + and ARMv8.0 +
isa familyARM +
ldateJanuary 2019 +
main imageFile:exynos 9820.png +
manufacturerSamsung +
market segmentMobile +
max cpu count1 +
max memory channels4 +
microarchitectureMongoose M4 +, Cortex-A75 + and Cortex-A55 +
model number9820 +
nameExynos 9820 +
process8 nm (0.008 μm, 8.0e-6 mm) +
seriesExynos 9 +
smp max ways1 +
supported memory typeLPDDR4X-3600 +
technologyCMOS +
thread count8 +
used bySamsung Galaxy S10 +
user equipment category downlink20 +
user equipment category uplink20 +
word size64 bit (8 octets, 16 nibbles) +