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Difference between revisions of "intel/xeon platinum/8163"
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Revision as of 02:16, 9 November 2018
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Xeon Platinum 8163 | |
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General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 8163 |
Market | Server |
Introduction | 2017 (announced) 2017 (launched) |
Shop | Amazon |
General Specs | |
Family | Xeon Platinum |
Series | 8000 |
Frequency | 2,500 MHz |
Clock multiplier | 25 |
CPUID | 0x50654 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Skylake SP |
Core Family | 6 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 24 |
Threads | 48 |
Max Memory | 768 GiB |
Multiprocessing | |
Max SMP | 8-Way (Multiprocessor) |
Packaging | |
Template:packages/intel/fclga-3647 |
Xeon Platinum 8163 is a 64-bit 24-core x86 multi-socket highest performance server microprocessor introduced by Intel in 2017. This chip supports up to 8-way multiprocessing. The Platinum 8163, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.5 GHz with a TDP of ? W and a turbo boost frequency of up to ? GHz, supports up 768 GiB of hexa-channel DDR4-2666 memory.
Contents
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon Platinum 8163 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8163 - Intel#io + |
base frequency | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 25 + |
core count | 24 + |
core family | 6 + |
core name | Skylake SP + |
cpuid | 0x50654 + |
designer | Intel + |
family | Xeon Platinum + |
first announced | 2017 + |
first launched | 2017 + |
full page name | intel/xeon platinum/8163 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 33 MiB (33,792 KiB, 34,603,008 B, 0.0322 GiB) + |
ldate | 2017 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 8 + |
max memory | 786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
microarchitecture | Skylake (server) + |
model number | 8163 + |
name | Xeon Platinum 8163 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 8000 + |
smp max ways | 8 + |
supported memory type | DDR4-2666 + |
technology | CMOS + |
thread count | 48 + |
word size | 64 bit (8 octets, 16 nibbles) + |