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Difference between revisions of "intel/cores/cascade lake ap"
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|package name 1=intel,fcbga_5903 | |package name 1=intel,fcbga_5903 | ||
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| − | '''Cascade Lake AP''' is a | + | '''Cascade Lake AP''' ('''Cascade Lake Advanced Performance''') is code name for a series of high core-count multi-chip packaged server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture. |
Revision as of 02:57, 5 November 2018
| Edit Values | |
| Cascade Lake AP | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Cascade Lake |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 14 nm 0.014 μm 1.4e-5 mm |
| Technology | CMOS |
| Packaging | |
| Package | FCBGA-5903 (BGA) |
| Pitch | 0.99 mm |
| Contacts | 5903 |
Cascade Lake AP (Cascade Lake Advanced Performance) is code name for a series of high core-count multi-chip packaged server multiprocessors based on the Cascade Lake microarchitecture.
Overview
| This section is empty; you can help add the missing info by editing this page. |
Common Features
| This section is empty; you can help add the missing info by editing this page. |
Cascade Lake AP Processors
| This section is empty; you can help add the missing info by editing this page. |
See also
|
• Power
• Performance |
Facts about "Cascade Lake AP - Cores - Intel"
| designer | Intel + |
| instance of | core + |
| isa | x86-64 + |
| manufacturer | Intel + |
| microarchitecture | Cascade Lake + |
| name | Cascade Lake AP + |
| package | FCBGA-5903 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |