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Difference between revisions of "amd/ryzen threadripper/2970wx"
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{{unknown features}}
 
{{unknown features}}
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== Cache ==
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{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
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{{cache size
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|l1 cache=2.25 MiB
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|l1i cache=1.5 MiB
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|l1i break=24x64 KiB
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|l1i desc=4-way set associative
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|l1d cache=768 KiB
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|l1d break=24x32 KiB
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|l1d desc=8-way set associative
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|l1d policy=write-back
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|l2 cache=12 MiB
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|l2 break=24x512 KiB
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|l2 desc=8-way set associative
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|l2 policy=write-back
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|l3 cache=64 MiB
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|l3 break=8x8 MiB
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|l3 desc=16-way set associative
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|l3 policy=write-back
 +
}}

Revision as of 10:16, 29 July 2018

Edit Values
Ryzen Threadripper 2970X
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number2970X
MarketDesktop
IntroductionAugust, 2018 (announced)
August, 2018 (launched)
ShopAmazon
General Specs
FamilyRyzen Threadripper
SeriesRyzen
LockedNo
Frequency3,500 MHz
Bus rate4 × 8 GT/s
Clock multiplier35
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen+
Core Family23
Process12 nm
TechnologyCMOS
Die213 mm²
MCPYes (4 dies)
Word Size64 bit
Cores24
Threads48
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP180 W

Ryzen Threadripper 2970X is a 64-bit tetracosa-core high-performance x86 desktop microprocessor introduced by AMD in mid-2018. The 2970X, which is based on their Zen+ microarchitecture, is fabricated on a 12 nm process. The 2970X operates at a base frequency of 3.5 GHz with a TDP of 180 W.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$2.25 MiB
2,304 KiB
2,359,296 B
L1I$1.5 MiB
1,536 KiB
1,572,864 B
24x64 KiB4-way set associative 
L1D$768 KiB
786,432 B
0.75 MiB
24x32 KiB8-way set associativewrite-back
L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  24x512 KiB8-way set associativewrite-back
L3$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
  8x8 MiB16-way set associativewrite-back
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/ryzen_threadripper/2970wx&oldid=80840"
Facts about "Ryzen Threadripper 2970WX - AMD"
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base frequency3,500 MHz (3.5 GHz, 3,500,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
clock multiplier35 +
core count24 +
core family23 +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
die count4 +
familyRyzen Threadripper +
first announcedAugust 2018 +
first launchedAugust 2018 +
full page nameamd/ryzen threadripper/2970wx +
has locked clock multiplierfalse +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
ldate3000 +
manufacturerGlobalFoundries +
market segmentDesktop +
max cpu count1 +
microarchitectureZen+ +
model number2970X +
nameRyzen Threadripper 2970X +
process12 nm (0.012 μm, 1.2e-5 mm) +
seriesRyzen +
smp max ways1 +
tdp180 W (180,000 mW, 0.241 hp, 0.18 kW) +
technologyCMOS +
thread count48 +
word size64 bit (8 octets, 16 nibbles) +