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Difference between revisions of "cavium/thunderx2/cn9970"
< cavium‎ | thunderx2

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|part number 5=CN9970-2100LG4077-Y21-G
 
|part number 5=CN9970-2100LG4077-Y21-G
 
|part number 6=CN9970-2000LG4077-Y21-G
 
|part number 6=CN9970-2000LG4077-Y21-G
 +
|part number 7=CN9970-1800LG4077-Y21-G
 
|market=Server
 
|market=Server
 
|first announced=May 7, 2018
 
|first announced=May 7, 2018
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|frequency 3=2,100 MHz
 
|frequency 3=2,100 MHz
 
|frequency 4=2,200 MHz
 
|frequency 4=2,200 MHz
 +
|frequency 5=2,300 MHz
 +
|frequency 6=2,400 MHz
 +
|frequency 7=2,500 MHz
 
|isa=ARMv8.1
 
|isa=ARMv8.1
 
|isa family=ARM
 
|isa family=ARM

Revision as of 00:26, 25 June 2018

Edit Values
ThunderX2 CN9970
General Info
DesignerCavium
ManufacturerTSMC
Model NumberCN9970
Part NumberCN9970-2500LG4077-Y21-G,
CN9970-2400LG4077-Y21-G,
CN9970-2300LG4077-Y21-G,
CN9970-2200LG4077-Y21-G,
CN9970-2100LG4077-Y21-G,
CN9970-2000LG4077-Y21-G,
CN9970-1800LG4077-Y21-G
MarketServer
IntroductionMay 7, 2018 (announced)
May 7, 2018 (launched)
General Specs
FamilyThunderX2
Frequency1,800 MHz, 2,000 MHz, 2,100 MHz, 2,200 MHz, 2,300 MHz, 2,400 MHz, 2,500 MHz
Microarchitecture
ISAARMv8.1 (ARM)
MicroarchitectureVulcan
Process16 nm
TechnologyCMOS
Word Size64 bit
Cores24
Threads96
Max Memory2 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Packaging
PackageFCLGA-4077 (LGA)
Contacts4077

ThunderX2 CN9970 is a 64-bit tetracosa-core high-performance ARM server microprocessor introduced by Cavium in mid-2018. The microprocessor, which is based on the Vulcan microarchitecture, is fabricated on TSMC's 16 nm process. Depending on the exact SKU, the CN9970 operates between 1.8 GHz and 2.5 GHz and supports up to quad-/hexa/octa-channel DDR4-2666 memory.

Cache

Main article: Vulcan § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1.5 MiB
1,536 KiB
1,572,864 B
L1I$768 KiB
786,432 B
0.75 MiB
24x32 KiB8-way set associative 
L1D$768 KiB
786,432 B
0.75 MiB
24x32 KiB8-way set associative 
L2$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  24x256 KiB8-way set associative 
L3$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  24x1 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem2 TiB
Controllers2
Channels8
Max Bandwidth158.95 GiB/s
162,764.8 MiB/s
170.671 GB/s
170,671.263 MB/s
0.155 TiB/s
0.171 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s
Quad 79.47 GiB/s
Hexa 119.21 GiB/s
Octa 158.95 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 56
Configuration: x16, x8, x4, x1
SATARevision: 3
Max Ports: 2
USBRevision: 3
Max Ports: 2


Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported ARM Extensions & Processor Features
NEONAdvanced SIMD extension
TrustZoneTrustZone Security Extensions
CRC32CRC-32 checksum Extension
CryptoCryptographic Extension
SIMDAdvanced SIMD extension
Retrieved from "https://en.wikichip.org/w/index.php?title=cavium/thunderx2/cn9970&oldid=79571"
Facts about "ThunderX2 CN9970 - Cavium"
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"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
ThunderX2 CN9970 - Cavium#pcie +
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) +, 2,000 MHz (2 GHz, 2,000,000 kHz) +, 2,100 MHz (2.1 GHz, 2,100,000 kHz) +, 2,200 MHz (2.2 GHz, 2,200,000 kHz) +, 2,300 MHz (2.3 GHz, 2,300,000 kHz) +, 2,400 MHz (2.4 GHz, 2,400,000 kHz) + and 2,500 MHz (2.5 GHz, 2,500,000 kHz) +
core count24 +
designerCavium +
familyThunderX2 +
first announcedMay 7, 2018 +
first launchedMay 7, 2018 +
full page namecavium/thunderx2/cn9970 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.1 +
isa familyARM +
l1$ size1,536 KiB (1,572,864 B, 1.5 MiB) +
l1d$ description8-way set associative +
l1d$ size768 KiB (786,432 B, 0.75 MiB) +
l1i$ description8-way set associative +
l1i$ size768 KiB (786,432 B, 0.75 MiB) +
l2$ description8-way set associative +
l2$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
l3$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
ldateMay 7, 2018 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth158.95 GiB/s (162,764.8 MiB/s, 170.671 GB/s, 170,671.263 MB/s, 0.155 TiB/s, 0.171 TB/s) +
max memory channels8 +
max sata ports2 +
max usb ports2 +
microarchitectureVulcan +
model numberCN9970 +
nameThunderX2 CN9970 +
packageFCLGA-4077 +
part numberCN9970-2500LG4077-Y21-G +, CN9970-2400LG4077-Y21-G +, CN9970-2300LG4077-Y21-G +, CN9970-2200LG4077-Y21-G +, CN9970-2100LG4077-Y21-G +, CN9970-2000LG4077-Y21-G + and CN9970-1800LG4077-Y21-G +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways2 +
supported memory typeDDR4-2666 +
technologyCMOS +
thread count96 +
word size64 bit (8 octets, 16 nibbles) +