Semiconductor & Computer Engineering
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Difference between revisions of "apm/microarchitectures/skylark"
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{{apm title|Skylark|arch}} | {{apm title|Skylark|arch}} | ||
| − | {{microarchitecture}} | + | {{microarchitecture |
| + | |atype=CPU | ||
| + | |name=Skylark | ||
| + | |designer=AppliedMicro | ||
| + | |designer 2=Ampere Computing | ||
| + | |manufacturer=TSMC | ||
| + | |introduction=2018 | ||
| + | |process=16 nm | ||
| + | |cores=32 | ||
| + | |type=Superscalar | ||
| + | |oooe=Yes | ||
| + | |speculative=Yes | ||
| + | |renaming=Yes | ||
| + | |isa=ARMv8 | ||
| + | |predecessor=Shadowcat | ||
| + | |predecessor link=apm/microarchitectures/shadowcat | ||
| + | |successor=Quicksilver | ||
| + | |successor link=ampere computing/microarchitectures/shadowcat | ||
| + | }} | ||
Revision as of 02:10, 9 February 2018
| Edit Values | |
| Skylark µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | AppliedMicro, Ampere Computing |
| Manufacturer | TSMC |
| Introduction | 2018 |
| Process | 16 nm |
| Core Configs | 32 |
| Pipeline | |
| Type | Superscalar |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Instructions | |
| ISA | ARMv8 |
| Succession | |
Facts about "Skylark - Microarchitectures - AppliedMicro"
| codename | Skylark + |
| core count | 32 + |
| designer | AppliedMicro + and Ampere Computing + |
| first launched | 2018 + |
| full page name | apm/microarchitectures/skylark + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Skylark + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |