Semiconductor & Computer Engineering
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Difference between revisions of "via technologies/microarchitectures/isaiah"
(Created page with "{{via title|Isaiah|arch}} {{microarchitecture |atype=CPU |name=Isaiah |designer=VIA Technologies |manufacturer=Fujitsu |manufacturer 2=TSMC |process=65 nm |process 2=45 nm |co...") |
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|manufacturer 2=TSMC | |manufacturer 2=TSMC | ||
|process=65 nm | |process=65 nm | ||
| − | |process 2= | + | |process 2=40 nm |
|cores=2 | |cores=2 | ||
|cores 2=4 | |cores 2=4 | ||
Revision as of 22:45, 14 January 2018
| Edit Values | |
| Isaiah µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | VIA Technologies |
| Manufacturer | Fujitsu, TSMC |
| Process | 65 nm, 40 nm |
| Core Configs | 2, 4 |
| Instructions | |
| ISA | x86-32 |
| Succession | |
Isaiah is the successor to Esther, an x86 microarchitecture designed by VIA Technologies for low power devices.
Facts about "Isaiah - Microarchitectures - VIA Technologies"
| codename | Isaiah + |
| core count | 2 + and 4 + |
| designer | VIA Technologies + |
| full page name | via technologies/microarchitectures/isaiah + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | Fujitsu + and TSMC + |
| microarchitecture type | CPU + |
| name | Isaiah + |
| process | 65 nm (0.065 μm, 6.5e-5 mm) + and 40 nm (0.04 μm, 4.0e-5 mm) + |