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Difference between revisions of "vti/vl86cx/vy86c710a"
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Latest revision as of 15:32, 13 December 2017

Edit Values
VY86C710A
General Info
DesignerARM Holdings
ManufacturerVLSI Technology
Model NumberVY86C710A
Part NumberVY86C710A
MarketEmbedded, Desktop
Introduction1995 (launched)
General Specs
FamilyVL86Cx
Frequency40 MHz
Microarchitecture
ISAARMv3 (ARM)
MicroarchitectureARM7
Core NameARM710A
Process0.5 µm
Transistors570,295
TechnologyCMOS
Die34 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Max Address Mem0xFFFFFFFF
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation425 mW
Vcore5 V ± 10 %
Tstorage-65 °C – -150 °C
Tambient-10 °C – 70 °C
Packaging
PackageTQFP-144 (TQFP)
Dimension20 mm x 20 mm x 1.6 mm
Pitch0.5 mm
Pin Count144

VY86C710A is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1995. This processor is based on the ARM7 microarchitecture (ARM710a core) and is manufactured on VLSI's 0.5 µm process and operating at 40 MHz.

According to ARM, this processor had the performance of 38 Dhrystone (2.2) MIPS for a 85 DMIPS/Watt.

Cache[edit]

Main article: ARM7 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$8 KiB
8,192 B
0.00781 MiB
  1x8 KiB64-way set associativewrite-through

Documents[edit]

Facts about "VY86C710A - VTI"
l1$ description64-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +