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Difference between revisions of "intel/microarchitectures/cannon lake"
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! Core !! Abbrev !! Description !! Graphics !! Target | ! Core !! Abbrev !! Description !! Graphics !! Target | ||
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| − | | {{intel|Cannonlake Y|l=core}} || | + | | {{intel|Cannonlake Y|l=core}} || CNL-Y || Extremely low power || GT2 || 2-in-1s detachable, tablets, and computer sticks |
|- | |- | ||
| − | | {{intel|Cannonlake U|l=core}} || | + | | {{intel|Cannonlake U|l=core}} || CNL-U || Ultra-low Power || GT2/GT3 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
|- | |- | ||
| − | | {{intel|Cannonlake H|l=core}} || | + | | {{intel|Cannonlake H|l=core}} || CNL-H || High-performance Graphics || GT2/GT3 || Ultimate mobile performance, mobile workstations |
|- style="text-decoration: line-through;" | |- style="text-decoration: line-through;" | ||
| − | | {{intel|Cannonlake S|l=core}} || | + | | {{intel|Cannonlake S|l=core}} || CNL-S || Performance-optimized lifestyle || GT2/GT3 || Desktop performance to value, AiOs, and minis |
|- style="text-decoration: line-through;" | |- style="text-decoration: line-through;" | ||
| − | | {{intel|Cannonlake DT|l=core}} || | + | | {{intel|Cannonlake DT|l=core}} || CNL-DT || Workstation || GT2 || Workstations & entry-level servers |
|} | |} | ||
Revision as of 03:00, 3 September 2017
| Edit Values | |
| Cannonlake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2017 |
| Process | 10 nm |
| Cores | |
| Core Names | Cannonlake Y, Cannonlake U |
| Succession | |
Cannonlake (CNL) (formerly Skymont) is a planned microarchitecture by Intel as a successor to Kaby Lake. Cannonlake is expected to be fabricated using a 10 nm process and is set to be introduced in the fourth quarter of 2017. Cannonlake is the "Process" microarchitecture as part of Intel's PAO model.
For mobile, Cannonlake is expected to be branded as 8th Generation Intel Core i3, Core i5. and Core i7 processors. There will be no desktop Cannonlake models.
Contents
Process Technology
Cannonlake is manufactured on Intel's 10 nm process (P1274). Intel's 10 nm process is the first high-volume manufacturing process to employ Self-Aligned Quad Patterning (SAQP) (goes under the "Hyper-Scaling" marketing name). Intel's 10nm features a 0.0367 µm² SRAM bit cell.
| Broadwell | Cannonlake | Δ | 
| |
|---|---|---|---|---|
| 14 nm | 10 nm | |||
| Fin Pitch | 42 nm | 34 | 0.81x | |
| Fin Width | 8 nm | ? nm | ?x | |
| Fin Height | 42 nm | 53 nm | 1.24x | |
| Gate Pitch | 70 nm | 54 nm | 0.77x | |
| Interconnect Pitch | 52 nm | 36 nm | 0.69x | |
| Cell Height | 399 nm | 272 nm | 0.68x |
Codenames
Intel cancelled Desktop Cannonlake models.
| Core | Abbrev | Description | Graphics | Target |
|---|---|---|---|---|
| Cannonlake Y | CNL-Y | Extremely low power | GT2 | 2-in-1s detachable, tablets, and computer sticks |
| Cannonlake U | CNL-U | Ultra-low Power | GT2/GT3 | Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
| Cannonlake H | CNL-H | High-performance Graphics | GT2/GT3 | Ultimate mobile performance, mobile workstations |
| Cannonlake S | CNL-S | Performance-optimized lifestyle | GT2/GT3 | Desktop performance to value, AiOs, and minis |
| Cannonlake DT | CNL-DT | Workstation | GT2 | Workstations & entry-level servers |
Architecture
 |
This section is empty; you can help add the missing info by editing this page. |
Key changes from Kaby Lake
- 10 nm process (from 14 nm)
- Mainstream chipset
- 200 Series chipset → 300 Series chipset
- Integrated Programmable (Open FW SDK) Quad-Core Audio DSP
- Soundwire Digital Audio Interface
- Integrated USB 3.1 (10 Gib/s)
- Up to 6 ports
- Integrated Intel wireless controller (IEEE 802.11ac)
- Integrated SDXC 3.0 controller
- Thunderbolt 3.0(Titan Ridge) with DisplayPort 1.4 support
- C10 & S0ix Support for Modern Standby
- 200 Series chipset → 300 Series chipset
- Gen9.5 → Gen10 graphics
- Gen10 GPUs
- HD Graphics 610 → HD Graphics 710 (24 Execution Units, 2x EUs from Kaby Lake)
- HD Graphics 615 → HD Graphics 715 (40 Execution Units, 1.7x EUs from Kaby Lake)
- HD Graphics 620 → HD Graphics 720 (40 Execution Units, 1.7x EUs from Kaby Lake)
- HD Graphics 630 → HD Graphics 730 (40 Execution Units, 1.7x EUs from Kaby Lake)
- HD Graphics P630 → HD Graphics P730 (40 Execution Units, 1.7x EUs from Kaby Lake)
- Iris Plus Graphics 640 → Iris Plus Graphics 740 (unknown change)
- Iris Plus Graphics 650 → Iris Plus Graphics 750 (unknown change)
All Cannonlake Chips
| Cannonlake Chips | |||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | IGP | Major Feature Diff | |||||||||||||||||||||
| Model | Launched | Price | Family | Platform | Core | C | T | L3$ | L4$ | TDP | Freq | Turbo | Max Mem | Name | Freq | Turbo | TBT | HT | AVX2 | TXT | TSX | vPro | VT-d |
| Uniprocessors | |||||||||||||||||||||||
| No Cannonlake Chips have been released yet. | |||||||||||||||||||||||
| Count: 0 | |||||||||||||||||||||||
References
- Mark Bohr, Intel. Intel Technology and Manufacturing Day. Mar 28, 2017.
See also
- AMD's Zen
Facts about "Cannon Lake - Microarchitectures - Intel"
| codename | Cannon Lake + |
| core count | 2 + |
| designer | Intel + |
| first launched | May 15, 2018 + |
| full page name | intel/microarchitectures/cannon lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Cannon Lake + |
| pipeline stages (max) | 19 + |
| pipeline stages (min) | 14 + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |