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Difference between revisions of "dec/strongarm"
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Revision as of 12:26, 29 May 2017
StrongARM (SA) was a family of 32-bit performance ARM processors for the embedded market designed collaboratively by DEC and ARM.
Retrieved from "https://en.wikichip.org/w/index.php?title=dec/strongarm&oldid=43430"
Facts about "StrongARM - DEC"
designer | DEC +, ARM Holdings + and Intel + |
full page name | dec/strongarm + |
instance of | microprocessor family + |
instruction set architecture | ARMv4 + |
main designer | DEC + |
manufacturer | DEC + and Intel + |
microarchitecture | StrongARM + |
name | StrongARM + |
package | MBGA-256 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) + and 250 nm (0.25 μm, 2.5e-4 mm) + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |