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Difference between revisions of "intel/chipsets/poulsbo"
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(Overview)
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| image            = poulsbo sch.png
 
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| caption          = Original package
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| image 2          = poulsbo sch (large package).png
 
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| caption 2        = A larger package was introduced in early 2009
 
| developer        = Intel
 
| developer        = Intel
 
| developer 2      = Imagination Technologies
 
| developer 2      = Imagination Technologies

Revision as of 23:50, 1 April 2017

Poulsbo
poulsbo sch.png
Original package
poulsbo sch (large package).png
A larger package was introduced in early 2009
Developer Intel, Imagination Technologies
Manufacturer Intel
Introduction March 2, 2008 (announced)
Process 0.13 μm
130 nm
1.3e-4 mm
Technology CMOS, GTL
Bus type FSB
Bus speed
0.533 GHz
533,000 kHz
533 MHz

Poulsbo is a chipset for Intel's first generation of Atom processors based on the Bonnell microarchitecture.

Overview

Comparison between the two Poulsbo packages.

The Poulsbo chipset, part of the Menlow, offers the memory controller along with the much of the southbridge. Unlike all previous front-side bus signaling logic which used GTL, to allow for more power saving, Poulsbo became the first chipset to support CMOS signaling as well. Such functionality was only offered by the Silverthorne-based processors. In 2009 Intel released a second variant of Poulsbo in a larger package.

Features

New text document.svg This section requires expansion; you can help adding the missing info.


Die Shot

poulsbo die.png


poulsbo die (annotated).png

bus speed533 MHz (0.533 GHz, 533,000 kHz) +
bus typeFSB +
designerIntel + and Imagination Technologies +
first announcedMarch 2, 2008 +
instance ofchipset +
manufacturerIntel +
namePoulsbo +
process130 nm (0.13 μm, 1.3e-4 mm) +
technologyCMOS + and GTL +