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Difference between revisions of "intel/cores/clarksfield"
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| + | '''Clarksfield''' is the core name given by [[Intel]] for their first generation ({{intel|Nehalem|l=arch}}-based) high-performance mobile processors. These chips are manufactured on a [[45 nm process]] and uses {{intel|PM55}} Express [[chipset]]. These MPUs introduce a number of new features. | ||
| + | |||
| + | == Features == | ||
| + | * [[45 nm process]] | ||
| + | * {{intel|PM55}} Express [[chipset]] ({{intel|Calpella}} platform) | ||
| + | * 4 Cores, 8 Threads | ||
| + | * 2.5 GT/s DMI 1.0 | ||
| + | * 8 GB Maximum Memory (DDR3-1333) | ||
| + | * Support everything up to SSE4.2 ({{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}) | ||
| + | * Supports {{intel|Hyper-Threading}}, {{intel|VT-x}}, {{intel|VT-d}}, {{intel|EPT}}, {{intel|TBT 1.0}}, and {{intel|TXT}} | ||
Revision as of 18:39, 26 November 2016
| Edit Values | |
| Clarksfield | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | June 24, 2009 (announced) September 23, 2009 (launched) |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Nehalem |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 45 nm 0.045 μm 4.5e-5 mm |
| Technology | CMOS |
| Clock | 1.60 GHz - 2.13 GHz |
| Succession | |
Clarksfield is the core name given by Intel for their first generation (Nehalem-based) high-performance mobile processors. These chips are manufactured on a 45 nm process and uses PM55 Express chipset. These MPUs introduce a number of new features.
Features
Facts about "Clarksfield - Cores - Intel"
| designer | Intel + |
| first announced | June 24, 2009 + |
| first launched | September 23, 2009 + |
| instance of | core + |
| isa | x86-64 + |
| manufacturer | Intel + |
| microarchitecture | Nehalem + |
| name | Clarksfield + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |