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Difference between revisions of "amd/athlon mp/amsn2000dut3c"
< amd‎ | athlon mp

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| socket 0            = Socket A
 
| socket 0            = Socket A
 
| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
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}}
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The '''Athlon MP 2000+''' (OPN ''AMSN2000DUT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] for the server and workstation market. This MPU operated at 1.6 GHz with a FSB transfer rate of 266 MT/s (x12.5 multiplier), was manufactured on a newer [[130 nm process]].
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== Cache ==
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{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
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{{cache info
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|l1i cache=64 KiB
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|l1i break=1x64 KiB
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|l1i desc=2-way set associative
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|l1i extra=
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|l1d cache=64 KiB
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|l1d break=1x64 KiB
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|l1d desc=2-way set associative
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|l1d extra=
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|l2 cache=256 KiB
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|l2 break=1x256 KiB
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|l2 desc=16-way set associative
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|l2 extra=
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|l3 cache=
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|l3 break=
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|l3 desc=
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|l3 extra=
 
}}
 
}}

Revision as of 10:47, 17 November 2016

Template:mpu The Athlon MP 2000+ (OPN AMSN2000DUT3C) based on the Thoroughbred core was a 32-bit x86 multiprocessor developed by AMD and introduced in late 2002 for the server and workstation market. This MPU operated at 1.6 GHz with a FSB transfer rate of 266 MT/s (x12.5 multiplier), was manufactured on a newer 130 nm process.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 16-way set associative
Facts about "Athlon MP 2000+ - AMD"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Athlon MP 2000+ - AMD#package +
base frequency1,667 MHz (1.667 GHz, 1,667,000 kHz) +
bus rate266 MT/s (0.266 GT/s, 266,000 kT/s) +
bus speed133 MHz (0.133 GHz, 133,000 kHz) +
bus typeFSB +
chipsetAMD-760MP +
clock multiplier12.5 +
core count1 +
core family6 +
core model8 +
core nameThoroughbred +
core stepping0 + and 1 +
core voltage1.6 V (16 dV, 160 cV, 1,600 mV) +
cpuid680 + and 681 +
designerAMD +
die area85 mm² (0.132 in², 0.85 cm², 85,000,000 µm²) +
familyAthlon MP +
first announcedAugust 27, 2002 +
first launchedAugust 27, 2002 +
full page nameamd/athlon mp/amsn2000dut3c +
has amd smartmp technologytrue +
has featureSmartMP Technology +, ACPI +, Halt State + and Stop Grant State +
has locked clock multipliertrue +
has multiprocessing supporttrue +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateAugust 27, 2002 +
manufacturerAMD +
market segmentServer +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count2 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberAthlon MP 2000+ +
nameAMD Athlon MP 2000+ +
packageOPGA-453 +
part numberAMSN2000DUT3C +
platformAthlon MP +
process130 nm (0.13 μm, 1.3e-4 mm) +
smp max ways2 +
tdp58.2 W (58,200 mW, 0.078 hp, 0.0582 kW) +
tdp (typical)52.8 W (52,800 mW, 0.0708 hp, 0.0528 kW) +
technologyCMOS +
thread count1 +
transistor count37,200,000 +
word size32 bit (4 octets, 8 nibbles) +