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Difference between revisions of "amd/k6-iii/amd-k6-iii-333afr"
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'''K6-III/333AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was manufactured on a [[0.25 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 333 MHz with a bus of 95 MHz. While default to a 95 MHz bus ([[Super 7]]), this model can also operate at the old [[Socket 7]] bus speed of 66 MHz (multiplier of 5). | '''K6-III/333AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was manufactured on a [[0.25 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 333 MHz with a bus of 95 MHz. While default to a 95 MHz bus ([[Super 7]]), this model can also operate at the old [[Socket 7]] bus speed of 66 MHz (multiplier of 5). | ||
| + | |||
| + | == Cache == | ||
| + | {{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}} | ||
| + | [[L3$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip. | ||
| + | {{cache info | ||
| + | |l1i cache=32 KB | ||
| + | |l1i break=1x32 KB | ||
| + | |l1i desc=2-way set associative | ||
| + | |l1i extra= | ||
| + | |l1d cache=32 KB | ||
| + | |l1d break=1x32 KB | ||
| + | |l1d desc=2-way set associative | ||
| + | |l1d extra= | ||
| + | |l2 cache=256 KB | ||
| + | |l2 break=1x256 | ||
| + | |l2 desc=4-way set associative | ||
| + | |l2 extra=(shared) | ||
| + | |l3 cache= | ||
| + | |l3 break= | ||
| + | |l3 desc= | ||
| + | |l3 extra= | ||
| + | }} | ||
Revision as of 16:27, 7 September 2016
Template:mpu K6-III/333AFR is a 32-bit x86 desktop microprocessor designed by AMD and introduced in early 1999. This MPU which was manufactured on a 0.25 µm process, based on K6-III microarchitecture, operated at 333 MHz with a bus of 95 MHz. While default to a 95 MHz bus (Super 7), this model can also operate at the old Socket 7 bus speed of 66 MHz (multiplier of 5).
Cache
- Main article: K6-III § Cache
L3$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L3$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
| L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
| L2$ | 256 KB "KB" is not declared as a valid unit of measurement for this property. |
1x256 4-way set associative (shared) |
Facts about "AMD-K6-III/333AFR - AMD"
| l1d$ description | 2-way set associative + |
| l1i$ description | 2-way set associative + |
| l2$ description | 4-way set associative + |