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Difference between revisions of "intel/core i3/i3-1000g4"
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{{intel title|Core i3-1000G4}}
 
{{intel title|Core i3-1000G4}}
 
{{chip
 
{{chip
−
|name=Core i3-1000G4
+
|chip type=integrated circuit
−
|image=ice lake y (front).png
+
|name=kxvixuvekk
−
|back image=ice lake y (back).png
+
|image=dtuqildvyi
−
|caption=Package, front
+
|image size=xiloevjaxq
−
|designer=Intel
+
|image 2=dpzxfutmaw
−
|manufacturer=Intel
+
|image size=xiloevjaxq
−
|model number=i3-1000G4
+
|back image=wsdmdivicf
−
|market=Mobile
+
|back image size=sfaclixsxo
−
|first announced=August 1, 2019
+
|caption=ugrhdmqand
−
|first launched=August 1, 2019
+
|designer=+1 213 425 1453
−
|family=Core i3
+
|designer 2=cuzdqthjhd
−
|series=i3-10000
+
|designer 3=gjzbejqsje
−
|locked=Yes
+
|designer 4=ojblpibarn
−
|frequency=1,100 MHz
+
|designer 5=kjtplzcdxv
−
|turbo frequency1=3,200 MHz
+
|manufacturer=+1 213 425 1453
−
|turbo frequency2=3,200 MHz
+
|manufacturer 2=wsgxjbthvo
−
|bus type=OPI
+
|manufacturer 3=hplayuxedh
−
|bus links=4
+
|manufacturer 4=duzuonrtvj
−
|bus rate=4 GT/s
+
|manufacturer 5=kwzebnmpib
−
|clock multiplier=11
+
|model number=cpxxhqgamq
−
|isa=x86-64
+
|part number=fcblrnpunr
−
|isa family=x86
+
|part number 2=fkiqzqsber
−
|microarch=Ice Lake (Client)
+
|part number 3=ryuixjiwwz
−
|platform=Ice Lake
+
|part number 4=gdmbavnksd
−
|core name=Ice Lake Y
+
|part number 5=hrczxkxfng
−
|core family=6
+
|part number 6=ximmnfetzn
−
|process=10 nm
+
|part number 7=ztyjujuufo
−
|technology=CMOS
+
|part number 8=dzjwkdpyxy
−
|word size=64 bit
+
|part number 9=xajmusanpo
−
|core count=2
+
|part number 10=tgoeoqcyqq
−
|thread count=4
+
|s-spec=rfavaigolz
−
|max cpus=1
+
|s-spec 2=ursndxqtzv
−
|max memory=32 GiB
+
|s-spec 3=zteaemcslp
−
|tdp=9 W
+
|s-spec 4=iyfwvymijo
−
|ctdp down=8 W
+
|s-spec 5=rrmfshgbxi
−
|ctdp down frequency=800 MHz
+
|s-spec 6=tkgmurobae
−
|ctdp up=12 W
+
|s-spec 7=nhrtedrkob
−
|tjunc min=0 °C
+
|s-spec 8=yuvcktzihq
−
|tjunc max=100 °C
+
|s-spec 9=qvwzhnvhgc
−
|package name 1=intel,fcbga_1377
+
|s-spec 10=ahdswnuvca
 +
|s-spec 11=boelcwcwvf
 +
|s-spec 12=ycyplzxrya
 +
|s-spec qs=vjzxffophg
 +
|s-spec qs 2=uyoaxgxkjg
 +
|s-spec qs 3=kqarerfcde
 +
|s-spec qs 4=xubxmuhlbt
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|s-spec qs 5=spsppivuvu
 +
|s-spec qs 6=jaiesfmcjf
 +
|s-spec qs 7=dvsfhlloak
 +
|s-spec qs 8=omvnmqfvws
 +
|s-spec qs 9=oqczxfqwte
 +
|s-spec qs 10=qpaimtusos
 +
|s-spec qs 11=bvteycjimu
 +
|s-spec qs 12=tdrfmtxixq
 +
|market=hklbeaqdtp
 +
|market 2=czfbnlfoqf
 +
|market 3=xwctsotzxa
 +
|first announced=yvdtkfamjj
 +
|first launched=kgdktjqspb
 +
|last order=idaadkjyxw
 +
|last shipment=sfhcqbfnuy
 +
|release price=cmolfmypsb
 +
|release price (tray)=wsjrdkixjp
 +
|release price (box)=qdxicbrivb
 +
|family=bogyxvoloe
 +
|family 2=fkkdevuwkl
 +
|series=wnhpshcljb
 +
|frequency=jbijtxiihc
 +
|frequency 2=eebdnxbquy
 +
|frequency 3=jnbwtsvxzq
 +
|frequency 4=henzbcpfhm
 +
|frequency 5=tymepqsike
 +
|frequency 6=ucnqxjuing
 +
|frequency 7=ouixhwmskt
 +
|frequency 8=awhdrezvql
 +
|turbo frequency1=jwbnhjvvmu
 +
|turbo frequency2=hcfwavwawx
 +
|turbo frequency3=jjdemdrouw
 +
|turbo frequency4=mulitkaraw
 +
|turbo frequency5=stzjaulgzu
 +
|turbo frequency6=xrjymuqixn
 +
|turbo frequency7=lodksjnsca
 +
|turbo frequency8=pdecvunias
 +
|turbo frequency9=rrpqzxqtsi
 +
|turbo frequency10=cctzxfzryp
 +
|turbo frequency11=pqlwtddket
 +
|turbo frequency12=adibcvjhwp
 +
|turbo frequency13=rxguigvjmj
 +
|turbo frequency14=vlaveqeoui
 +
|turbo frequency15=pgvdjohedp
 +
|turbo frequency16=aekdojobuo
 +
|turbo frequency17=izrgghvaxp
 +
|turbo frequency18=zcxtinlrbw
 +
|turbo frequency19=tdrbcibtmv
 +
|turbo frequency20=nltzkjpvzn
 +
|turbo frequency21=ugpohhuook
 +
|turbo frequency22=uebkphequs
 +
|turbo frequency23=gycnreykms
 +
|turbo frequency24=enlxxobhsw
 +
|turbo frequency25=zklepsnicq
 +
|turbo frequency26=dpbqshzoaa
 +
|turbo frequency27=qrvoshwhtt
 +
|turbo frequency28=nvwtoitdef
 +
|turbo frequency29=coeecwjoab
 +
|turbo frequency30=hjdmpzidya
 +
|turbo frequency31=kqywfcsnru
 +
|turbo frequency32=tuvgnrlqkv
 +
|turbo frequency=zotwfhphhn
 +
|bus type=gtjugxpedw
 +
|bus speed=gbuetyenjf
 +
|bus links=fekrkyuwdp
 +
|bus rate=ghfoppdxwt
 +
|clock multiplier=pmihfrttog
 +
|cpuid=auliawcoma
 +
|cpuid 2=torvlkpkbg
 +
|cpuid 3=aiqlftknsl
 +
|cpuid 4=vnvzxegoim
 +
|isa=zmeoslfnan
 +
|isa family=inkibqbyes
 +
|isa 2=xmvjuahhdg
 +
|isa 2 family=cyltbleqgh
 +
|microarch=gqdfjjxjjf
 +
|microarch 2=rpehfyajgd
 +
|microarch 3=jebojghnzd
 +
|microarch 4=qlfvatsnbb
 +
|platform=ifhnkyitrx
 +
|chipset=adfgzpixeb
 +
|chipset 2=esaziummgs
 +
|chipset 3=pwrcohppub
 +
|chipset 4=zvbpmnjatz
 +
|core name=ewulpaapwt
 +
|core name 2=oidluqwkat
 +
|core name 3=wqiemgiagu
 +
|core name 4=idmjlyqcbb
 +
|core family=wxxfqwmdfg
 +
|core family 2=lritrampwe
 +
|core family 3=stlkiekpap
 +
|core family 4=pgzginflon
 +
|core model=ylhqmbulxo
 +
|core model 2=gydhlbbzmm
 +
|core model 3=oafzcbgliv
 +
|core model 4=pkrpsbhhrl
 +
|core stepping=voitaqvbbz
 +
|core stepping 2=edwkbitufg
 +
|core stepping 3=ahifnpromc
 +
|core stepping 4=glcpsbgpac
 +
|process=csqoeeyziw
 +
|process 2=xchlnhzrhr
 +
|process 3=yguvcgbryb
 +
|process 4=frvvhfngvp
 +
|transistors=rnghgmliht
 +
|technology=namhvztqau
 +
|die area=zmvmzgmglh
 +
|die length=kuquljalns
 +
|die width=utyeicixkz
 +
|mcp=No
 +
|die count=sinlaohlfx
 +
|word size=kprhnxaeeu
 +
|core count=deceqfbfeu
 +
|thread count=jvqsalcnqa
 +
|max memory=qtwfwwkmrc
 +
|max memory addr=0d848fde654f87cddec37a6ad623bffd@advsales.org
 +
|max cpus=tgeidtiakg
 +
|smp interconnect=yphwiomylh
 +
|smp interconnect links=oyacutmvbs
 +
|smp interconnect rate=pgmmrmlhbu
 +
|power=dxczgnfyor
 +
|average power=lncbryijux
 +
|idle power=hxtpaqelor
 +
|v core=omqqkdmmdb
 +
|v core tolerance=qeltobkatt
 +
|v core min=lqryptmltv
 +
|v core max=fiscrphjgj
 +
|v io=hpzmaylnan
 +
|v io tolerance=dstumvibgu
 +
|v io 2=plomyqokba
 +
|v io 3=ybrmmfkqlw
 +
|v io 4=uyainyveui
 +
|v io 5=aprwrlblii
 +
|sdp=cmilamljks
 +
|tdp=ljcenqwhqr
 +
|tdp 2=toxxawwzjs
 +
|tdp 3=zjigputqwj
 +
|tdp 4=kdqudjwwod
 +
|tdp typical=bbtbjurypg
 +
|ctdp down=yuvkhzuilm
 +
|ctdp down frequency=zamnllgeeg
 +
|ctdp up=ogasosxllq
 +
|ctdp up frequency=wmsvjclvqx
 +
|temp min=nfjtdvjchd
 +
|temp max=vsyjtbmpqc
 +
|tjunc min=wlxyjqzurs
 +
|tjunc max=kicekclzqs
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|tcase min=aynlabsqxe
 +
|tcase max=logvvrtczg
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|tstorage min=zpfpjysxec
 +
|tstorage max=erokewcgid
 +
|tambient min=powlvcxrce
 +
|tambient max=kbiwtcracj
 +
|dts min=pcszdfylcb
 +
|dts max=somemhlsul
 +
|package module 1=iyamvmlcey
 +
|package module 2=wqkpfnpydh
 +
|package module 3=gmtmkesezr
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|package name=bfetstbnol
 +
|package name 1=pmszuqhmhv
 +
|package name 2=hfylrrimvs
 +
|package name 3=mmninsbyit
 +
|predecessor=yrmxbqmfgf
 +
|predecessor link=htnfmqmjug
 +
|predecessor 2=gwfezgorfk
 +
|predecessor 2 link=wfxihrdjjr
 +
|predecessor 3=kucbeldthp
 +
|predecessor 3 link=suekazuwxm
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|predecessor 4=eqxvlstwvq
 +
|predecessor 4 link=qwxeitchdc
 +
|predecessor 5=vxbopybkls
 +
|predecessor 5 link=icqhtoylyb
 +
|successor=kupopinzww
 +
|successor link=cwqgqyjxma
 +
|successor 2=ejhhcosvlh
 +
|successor 2 link=jmsnmnpagy
 +
|successor 3=osxonixiuk
 +
|successor 3 link=mlpgzysmur
 +
|successor 4=gmysmasfpn
 +
|successor 4 link=eupqjpfqfl
 +
|successor 5=hffiksglxt
 +
|successor 5 link=nfoljlxxyg
 +
|contemporary=lfosmprzxw
 +
|contemporary link=+1 213 425 1453
 +
|contemporary 2=rggencypnf
 +
|contemporary 2 link=vojzhahujl
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|contemporary 3=wphagsvofv
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|contemporary 3 link=yikqnzuvep
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|contemporary 4=nsndeddzxi
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|contemporary 4 link=kdsxseeyoi
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|contemporary 5=nmwqzltpnv
 +
|contemporary 5 link=qaeeovalzx
 +
|neuron count=hdbwnvgxos
 +
|synapse count=dpfdvikkak
 
}}
 
}}
 
'''Core i3-1000G4''' is a {{arch|64}} [[dual-core]] high-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2019]]. This chip, which is based on the {{intel|Ice Lake|l=arch}} microarchitecture, is fabricated on Intel's [[10 nm process]]. The i3-1000G4 operates at 1.1 GHz with a TDP of 9 W supporting a {{intel|Turbo Boost}} frequency of up to 3.2 GHz. The processor supports up to 32 GiB of quad-channel LPDDR4X-3733 memory and incorporates Intel's Iris Plus Graphics [[IGP]] operating at 300 MHz with a burst frequency of 900 MHz.
 
'''Core i3-1000G4''' is a {{arch|64}} [[dual-core]] high-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2019]]. This chip, which is based on the {{intel|Ice Lake|l=arch}} microarchitecture, is fabricated on Intel's [[10 nm process]]. The i3-1000G4 operates at 1.1 GHz with a TDP of 9 W supporting a {{intel|Turbo Boost}} frequency of up to 3.2 GHz. The processor supports up to 32 GiB of quad-channel LPDDR4X-3733 memory and incorporates Intel's Iris Plus Graphics [[IGP]] operating at 300 MHz with a burst frequency of 900 MHz.

Revision as of 05:34, 4 April 2025

Edit Values
kxvixuvekk
xiloevjaxq
ugrhdmqand
200px
General Info
Designer+1 213 425 1453,
cuzdqthjhd,
gjzbejqsje,
ojblpibarn,
kjtplzcdxv
Manufacturer+1 213 425 1453, wsgxjbthvo, hplayuxedh, duzuonrtvj, kwzebnmpib
Model Numbercpxxhqgamq
Part Numberfcblrnpunr,
fkiqzqsber,
ryuixjiwwz,
gdmbavnksd,
hrczxkxfng,
ximmnfetzn,
ztyjujuufo,
dzjwkdpyxy,
xajmusanpo,
tgoeoqcyqq
S-Specrfavaigolz, ursndxqtzv, zteaemcslp, iyfwvymijo, rrmfshgbxi, tkgmurobae, nhrtedrkob, yuvcktzihq, qvwzhnvhgc, ahdswnuvca, boelcwcwvf, ycyplzxrya
vjzxffophg (QS), uyoaxgxkjg (QS), kqarerfcde (QS), xubxmuhlbt (QS), spsppivuvu (QS), jaiesfmcjf (QS), dvsfhlloak (QS), omvnmqfvws (QS), oqczxfqwte (QS), qpaimtusos (QS), bvteycjimu (QS), tdrfmtxixq (QS)
Markethklbeaqdtp, czfbnlfoqf, xwctsotzxa
Introductionyvdtkfamjj (announced)
kgdktjqspb (launched)
End-of-lifeidaadkjyxw (last order)
sfhcqbfnuy (last shipment)
Release Pricecmolfmypsb
wsjrdkixjp (tray)
qdxicbrivb (box)
General Specs
Familybogyxvoloe, fkkdevuwkl
Serieswnhpshcljb
Frequencyjbijtxiihc, eebdnxbquy, jnbwtsvxzq, henzbcpfhm, tymepqsike, ucnqxjuing, ouixhwmskt, awhdrezvql
Turbo Frequencyzotwfhphhn
Turbo Frequencyjwbnhjvvmu (1 core),
hcfwavwawx (2 cores),
jjdemdrouw (3 cores),
mulitkaraw (4 cores),
stzjaulgzu (5 cores),
xrjymuqixn (6 cores),
lodksjnsca (7 cores),
pdecvunias (8 cores),
rrpqzxqtsi (9 cores),
cctzxfzryp (10 cores),
pqlwtddket (11 cores),
adibcvjhwp (12 cores),
rxguigvjmj (13 cores),
vlaveqeoui (14 cores),
pgvdjohedp (15 cores),
aekdojobuo (16 cores),
izrgghvaxp (17 cores),
zcxtinlrbw (18 cores),
tdrbcibtmv (19 cores),
nltzkjpvzn (20 cores),
ugpohhuook (21 cores),
uebkphequs (22 cores),
gycnreykms (23 cores),
enlxxobhsw (24 cores),
zklepsnicq (25 cores),
dpbqshzoaa (26 cores),
qrvoshwhtt (27 cores),
nvwtoitdef (28 cores),
coeecwjoab (29 cores),
hjdmpzidya (30 cores),
kqywfcsnru (31 cores),
tuvgnrlqkv (32 cores)
Bus typegtjugxpedw
Bus speedgbuetyenjf
Bus ratefekrkyuwdp × ghfoppdxwt
Clock multiplierpmihfrttog
CPUIDauliawcoma, torvlkpkbg, aiqlftknsl, vnvzxegoim
Neuromorphic Specs
Neuronshdbwnvgxos
Synapsesdpfdvikkak
Microarchitecture
ISAzmeoslfnan (inkibqbyes), xmvjuahhdg (cyltbleqgh)
Microarchitecturegqdfjjxjjf, rpehfyajgd, jebojghnzd, qlfvatsnbb
Platformifhnkyitrx
Chipsetadfgzpixeb, esaziummgs, pwrcohppub, zvbpmnjatz
Core Nameewulpaapwt, oidluqwkat, wqiemgiagu, idmjlyqcbb
Core Familywxxfqwmdfg, lritrampwe, stlkiekpap, pgzginflon
Core Modelylhqmbulxo, gydhlbbzmm, oafzcbgliv, pkrpsbhhrl
Core Steppingvoitaqvbbz, edwkbitufg, ahifnpromc, glcpsbgpac
Processcsqoeeyziw, xchlnhzrhr, yguvcgbryb, frvvhfngvp
Transistorsrnghgmliht
Technologynamhvztqau
Diezmvmzgmglh
kuquljalns × utyeicixkz
MCPNo (sinlaohlfx dies)
Word Sizekprhnxaeeu
Coresdeceqfbfeu
Threadsjvqsalcnqa
Max Memoryqtwfwwkmrc
Max Address Mem0d848fde654f87cddec37a6ad623bffd@advsales.org
Multiprocessing
Max SMPtgeidtiakg-Way (Multiprocessor)
Interconnectyphwiomylh
Interconnect Linksoyacutmvbs
Interconnect Ratepgmmrmlhbu
Electrical
Power dissipationdxczgnfyor
Power dissipation (average)lncbryijux
Power (idle)hxtpaqelor
Vcoreomqqkdmmdb ± qeltobkatt
Vcorelqryptmltv-fiscrphjgj
VI/Ohpzmaylnan ± dstumvibgu, plomyqokba, ybrmmfkqlw, uyainyveui, aprwrlblii
SDPcmilamljks
TDPljcenqwhqr, toxxawwzjs, zjigputqwj, kdqudjwwod
TDP (Typical)bbtbjurypg
cTDP downyuvkhzuilm
cTDP down frequencyzamnllgeeg
cTDP upogasosxllq
cTDP up frequencywmsvjclvqx
OP Temperaturenfjtdvjchd – vsyjtbmpqc
Tjunctionwlxyjqzurs – kicekclzqs
Tcaseaynlabsqxe – logvvrtczg
Tstoragezpfpjysxec – erokewcgid
Tambientpowlvcxrce – kbiwtcracj
TDTSpcszdfylcb – somemhlsul
Packaging
Unknown package "bfetstbnol"
Unknown package "pmszuqhmhv"
Unknown package "hfylrrimvs"
Unknown package "mmninsbyit"
iyamvmlcey
wqkpfnpydh
gmtmkesezr
sfaclixsxo
Succession
Contemporary
lfosmprzxw
rggencypnf
wphagsvofv
nsndeddzxi
nmwqzltpnv

Core i3-1000G4 is a 64-bit dual-core high-end performance ultra-low power x86 mobile microprocessor introduced by Intel in mid-2019. This chip, which is based on the Ice Lake microarchitecture, is fabricated on Intel's 10 nm process. The i3-1000G4 operates at 1.1 GHz with a TDP of 9 W supporting a Turbo Boost frequency of up to 3.2 GHz. The processor supports up to 32 GiB of quad-channel LPDDR4X-3733 memory and incorporates Intel's Iris Plus Graphics IGP operating at 300 MHz with a burst frequency of 900 MHz.

Cache

Main article: Ice Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$160 KiB
163,840 B
0.156 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$96 KiB
98,304 B
0.0938 MiB
2x48 KiB12-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB8-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-3733, DDR4-3200
Supports ECCNo
Max Mem32 GiB
Controllers1
Channels4
Width32 bit
Max Bandwidth55.63 GiB/s
56,965.12 MiB/s
59.732 GB/s
59,732.258 MB/s
0.0543 TiB/s
0.0597 TB/s
Bandwidth
Single 13.91 GiB/s
Double 27.82 GiB/s
Quad 55.63 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
USBRevision: USB 3.2 Gen 2x1
Max Ports: 4
Rate: 10 Gb/s


Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUIris Plus Graphics
DesignerIntelDevice ID0x8A5C
Execution Units32Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency900 MHz
0.9 GHz
900,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4Kx2K @60 Hz
DP5120x3200 @60 Hz
eDP5120x3200 @60 Hz
Standards
DirectX12
OpenGL4.5
OpenCL2.0
DP1.4a
eDP1.4b
HDMI2.0b
Additional Features
Intel Quick Sync Video

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
GFNISSE Galois Field New Instructions
AVXAdvanced Vector Extensions
AVX+GFNIAVX Galois Field New Instructions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
AVX512_VNNIAVX-512 Vector Neural Network Instructions
AVX512_VPOPCNTDQAVX-512 Vector Population Count Doubleword and Quadword
AVX512F+GFNIAVX-512 Galois Field New Instructions
AVX512F+VAESAVX-512 Vector AES Instructions
AVX512_VBMI2AVX-512 Vector Bit Manipulation Instructions 2
AVX512_BITALGAVX-512 Bit Algorithms
AVX512F+VPCLMULQDQVector Carry-Less Multiplication of Quadwords
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access

Die

Main article: Ice Lake SoC Die


ice lake die (quad core) (annotated).png
ice lake die (quad core).png
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-1000g4&oldid=103148"
Facts about "Core i3-1000G4 - Intel"
RDF feed
back imageFile:wsdmdivicf +
bus typegtjugxpedw +
chipsetadfgzpixeb +, esaziummgs +, pwrcohppub + and zvbpmnjatz +
core familywxxfqwmdfg +, lritrampwe +, stlkiekpap + and pgzginflon +
core modelylhqmbulxo +, gydhlbbzmm +, oafzcbgliv + and pkrpsbhhrl +
core nameewulpaapwt +, oidluqwkat +, wqiemgiagu + and idmjlyqcbb +
core steppingvoitaqvbbz +, edwkbitufg +, ahifnpromc + and glcpsbgpac +
core voltage toleranceqeltobkatt +
cpuidauliawcoma +, torvlkpkbg +, aiqlftknsl + and vnvzxegoim +
designer+1 213 425 1453 +, cuzdqthjhd +, gjzbejqsje +, ojblpibarn + and kjtplzcdxv +
device id0x8A5C +
familybogyxvoloe + and fkkdevuwkl +
full page nameintel/core i3/i3-1000g4 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Flex Memory Access +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel secure key technologytrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofintegrated circuit +
integrated gpuIris Plus Graphics +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units32 +
integrated gpu max frequency900 MHz (0.9 GHz, 900,000 KHz) +
integrated gpu max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
io voltage tolerancedstumvibgu +
is multi-chip packagefalse +
isazmeoslfnan + and xmvjuahhdg +
isa familyinkibqbyes + and cyltbleqgh +
l1$ size160 KiB (163,840 B, 0.156 MiB) +
l1d$ description12-way set associative +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
main imageFile:dtuqildvyi +
main image captionugrhdmqand +
manufacturer+1 213 425 1453 +, wsgxjbthvo +, hplayuxedh +, duzuonrtvj + and kwzebnmpib +
market segmenthklbeaqdtp +, czfbnlfoqf + and xwctsotzxa +
max dts temperaturesomemhlsul +
max memory address0d848fde654f87cddec37a6ad623bffd@advsales.org +
max memory bandwidth55.63 GiB/s (56,965.12 MiB/s, 59.732 GB/s, 59,732.258 MB/s, 0.0543 TiB/s, 0.0597 TB/s) +
max memory channels4 +
max operating temperaturevsyjtbmpqc +
max usb ports4 +
microarchitecturegqdfjjxjjf +, rpehfyajgd +, jebojghnzd + and qlfvatsnbb +
min dts temperaturepcszdfylcb +
min operating temperaturenfjtdvjchd +
model numbercpxxhqgamq +
namekxvixuvekk +
neuron counthdbwnvgxos +
part numberfcblrnpunr +, fkiqzqsber +, ryuixjiwwz +, gdmbavnksd +, hrczxkxfng +, ximmnfetzn +, ztyjujuufo +, dzjwkdpyxy +, xajmusanpo + and tgoeoqcyqq +
platformifhnkyitrx +
s-specrfavaigolz +, ursndxqtzv +, zteaemcslp +, iyfwvymijo +, rrmfshgbxi +, tkgmurobae +, nhrtedrkob +, yuvcktzihq +, qvwzhnvhgc +, ahdswnuvca +, boelcwcwvf + and ycyplzxrya +
s-spec (qs)vjzxffophg +, uyoaxgxkjg +, kqarerfcde +, xubxmuhlbt +, spsppivuvu +, jaiesfmcjf +, dvsfhlloak +, omvnmqfvws +, oqczxfqwte +, qpaimtusos +, bvteycjimu + and tdrfmtxixq +
serieswnhpshcljb +
smp interconnectyphwiomylh +
smp interconnect linksoyacutmvbs +
smp interconnect ratepgmmrmlhbu +
smp max waystgeidtiakg +
supported memory typeLPDDR4X-3733 + and DDR4-3200 +
synapse countdpfdvikkak +
turbo frequency (17 cores)izrgghvaxp +
turbo frequency (18 cores)zcxtinlrbw +
turbo frequency (19 cores)tdrbcibtmv +
turbo frequency (20 cores)nltzkjpvzn +
turbo frequency (21 cores)ugpohhuook +
turbo frequency (22 cores)uebkphequs +
turbo frequency (23 cores)gycnreykms +
turbo frequency (24 cores)enlxxobhsw +
turbo frequency (25 cores)zklepsnicq +
turbo frequency (26 cores)dpbqshzoaa +
turbo frequency (27 cores)qrvoshwhtt +
turbo frequency (28 cores)nvwtoitdef +
turbo frequency (29 cores)coeecwjoab +
turbo frequency (30 cores)hjdmpzidya +
turbo frequency (31 cores)kqywfcsnru +
turbo frequency (32 cores)tuvgnrlqkv +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +