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Difference between revisions of "amd/packages/ft3b"
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Latest revision as of 15:33, 16 March 2023
Edit Values | |
FT3b | |
General Info | |
Designer | AMD |
Introduction | June 4, 2014 (launched) |
Market | Mobile, Embedded |
Microarchitecture | Puma |
TDP | 25 W 25,000 mW 0.0335 hp 0.025 kW |
Package | |
Name | BGA-769 |
Type | Organic Micro Ball Grid Array |
Contacts | 769 |
Dimension | 24.5 mm 2.45 cm × 24.5 mm0.965 in 2.45 cm 0.965 in |
Pitch | 0.65 mm 0.0256 in |
FT3b is a BGA-769 package for low power AMD microprocessors with an integrated north bridge, graphics processor, and controller hub targeting the notebook, tablet, all-in-one desktop, and embedded segment. FT3b succeeded the FT3 package and was superseded by the FT4 package.
All processors in the FT3b package, codename "Beema", "Mullins", "Steppe Eagle", "Crowned Eagle", and "Carrizo-L", are members of AMD's Family 16h with CPU cores based on the Puma microarchitecture, and are fabricated on a 28 nm SOI process.
The FT3b package is mechanically and electrically compatible with the FT3 package for processors based on the earlier Jaguar microarchitecture.
Contents
Features[edit]
- 769-pin lidless micro ball grid array package, 0.65-1.1 mm multi-pitch, 24.5 × 24.5 mm, organic substrate
- 64/72 bit DDR3 SDRAM interface up to 933 MHz, PC3-14900 (DDR3-1866), 14.9 GB/s
- Up to 2 SR/DR UDIMMs or SODIMMs, ECC supported
- JEDEC 1.5V, 1.35V, 1.25V
- AMD Memory Controller PowerCap
- PCIe Gen 1.0 and 2.0 (5 GT/s)
- One x4 external graphics card link
- Configurable x4 General Purpose Ports (1x4, 2x2, 1x2 + 2x1, 4x1)
- Two independent display controllers
- Two single link digital display interfaces
- DisplayPort 1.2 up to 4096 × 2160 at 30 Hz, 30 bpp
- Single link DVI up to 1920 × 1200 at 60 Hz, 24 bpp
- Integrated LVDS interface
- HDMI, HDCP, eDP 1.4, DP++, 3D video, DP audio, Aux Channel
- VGA/DAC interface, up to 2048 × 1536 at 60 Hz
- Miracast-certified, one wireless display up to 1920 × 1080, HDCP 2
- Integrated Controller Hub
- 2 × USB 1.1, 2.0, 3.0 (5 Gb/s)
- 8 × USB 1.1, 2.0
- 2 × SATA 1.0, 2.0, 3.0 (6 Gb/s)
- 2 × 1 Gigabit Ethernet, multiplexed with GPP
- SD 3.0 interface, SMBus, LPC, HD audio, 4 × UART, Serial IRQ, SPI, GPIO
- Power Management
- AMD AllDay power technology
- ACPI P-states, processor power states C0, C1, CC6, PC6, sleep states S0, S3, S4, S5
- PCIe power gating
- PCIe speed power policy
- AMD Turbo CORE technology 3.0 with per core power gating
- Thermal Controls
- Sideband temperature control
- Hardware thermal control
- Local hardware thermal control
- DRAM thermal protection
- Fan control
Processors using package FT3b[edit]
- AMD A-Series
- AMD E-Series
- AMD G-Series 2nd Gen
- AMD G-Series LX Family
List of all FT3b-based Processors | |||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Model | Price | Process | Launched | µarch | Family | Core | C | T | Freq | Turbo | TDP | ||||||||
Count: 0 |
Package Diagram[edit]
See Package FT3.
Pin Map[edit]
See Package FT3.
References[edit]
- "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Models 30h-3Fh Processors", AMD Publ. #52740, Rev. 3.06, March 18, 2016
- "Revision Guide for AMD Family 16h Models 30h-3Fh Processors", AMD Publ. #53072, Rev. 3.00, May 2, 2014
- "Product Brief: 1st and 2nd Generation AMD Embedded G-Series System-on-Chip (SOC)", PID 169776-A, 2015
- "Product Brief: AMD Embedded G-Series LX Family SOCs", PID 1710902-C, 2017
See also[edit]
Facts about "Package FT3b - AMD"
designer | AMD + |
first launched | June 4, 2014 + |
instance of | package + |
market segment | Mobile + and Embedded + |
microarchitecture | Puma + |
name | FT3b + |
package | BGA-769 + |
package contacts | 769 + |
package length | 24.5 mm (2.45 cm, 0.965 in) + |
package pitch | 0.65 mm (0.0256 in) + |
package type | Organic Micro Ball Grid Array + |
package width | 24.5 mm (2.45 cm, 0.965 in) + |
tdp | 25 W (25,000 mW, 0.0335 hp, 0.025 kW) + |