Line 54: | Line 54: | ||
|l3 cache=8 MiB | |l3 cache=8 MiB | ||
|l3 break=2x4 MiB | |l3 break=2x4 MiB | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s). | ||
+ | |||
+ | {{memory controller | ||
+ | |type=DDR4-3200 | ||
+ | |type 2=LPDDR4x-4266 | ||
+ | |max mem=64 GiB | ||
+ | |controllers=2 | ||
+ | |channels=4 | ||
+ | |max bandwidth=68.27 GiB/s | ||
+ | |bandwidth schan=17.88 GiB/s | ||
+ | |bandwidth dchan=34.13 GB/s | ||
+ | |bandwidth qchan=68.27 GB/s | ||
}} | }} |
Revision as of 15:19, 9 May 2020
Edit Values | |
Ryzen 5 4600HS | |
General Info | |
Designer | AMD |
Manufacturer | TSMC |
Model Number | 4600HS |
Market | Mobile |
Introduction | March 16, 2020 (announced) March 16, 2020 (launched) |
Shop | Amazon |
General Specs | |
Family | Ryzen 5 |
Series | 4000 |
Locked | Yes |
Frequency | 3,000 MHz |
Turbo Frequency | 4,000 MHz |
Clock multiplier | 30 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen 2 |
Core Name | Renoir |
Process | 7 nm |
Transistors | 9,800,000,000 |
Technology | CMOS |
Die | 156 mm² |
Word Size | 64 bit |
Cores | 6 |
Threads | 12 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 35 W |
Tcase | 0 °C – 105 °C |
Packaging | |
Unknown package "amd,socket_fp6" |
Ryzen 5 4600HS is a 64-bit hexa-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process based on AMD's Zen 2 microarchitecture, the 4600HS operates at a base frequency of 3.0 GHz with a TDP of 35 W and a Boost frequency of up to 4.0 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4600HS integrates a Radeon Vega 6 Graphics operating at up to 1.5 GHz.
This processor is identical to the 4600H except for its lower TDP.
Cache
- Main article: Zen 2 § Cache
![]() |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||||||||||||||||||||||||||
|
Memory controller
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
![]() |
Integrated Memory Controller
|
|||||||||||
|
base frequency | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
clock multiplier | 30 + |
core count | 6 + |
core name | Renoir + |
designer | AMD + |
die area | 156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) + |
family | Ryzen 5 + |
first announced | March 16, 2020 + |
first launched | March 16, 2020 + |
full page name | amd/ryzen 5/4600hs + |
has ecc memory support | false + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
ldate | March 16, 2020 + |
manufacturer | TSMC + |
market segment | Mobile + |
max case temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max cpu count | 1 + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 68.27 GiB/s (69,908.48 MiB/s, 73.304 GB/s, 73,304.354 MB/s, 0.0667 TiB/s, 0.0733 TB/s) + |
max memory channels | 4 + |
microarchitecture | Zen 2 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 4600HS + |
name | Ryzen 5 4600HS + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |
series | 4000 + |
smp max ways | 1 + |
supported memory type | DDR4-3200 + and LPDDR4x-4266 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 12 + |
transistor count | 9,800,000,000 + |
turbo frequency | 4,000 MHz (4 GHz, 4,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |