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Difference between revisions of "intel/xeon gold/6240r"
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'''Xeon Gold 6240R''' is a {{arch|64}} [[24-core]] [[x86]] high performance server microprocessor introduced by [[Intel]] in early [[2020]]. The Gold 6240R is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 2-way multiprocessing, sports 2 {{x86|AVX-512}} [[FMA]] units as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 2.4 GHz with a TDP of 165 W and features a {{intel|turbo boost}} frequency of up to 4.0 GHz. | '''Xeon Gold 6240R''' is a {{arch|64}} [[24-core]] [[x86]] high performance server microprocessor introduced by [[Intel]] in early [[2020]]. The Gold 6240R is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 2-way multiprocessing, sports 2 {{x86|AVX-512}} [[FMA]] units as well as two {{intel|Ultra Path Interconnect}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 2.4 GHz with a TDP of 165 W and features a {{intel|turbo boost}} frequency of up to 4.0 GHz. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/cascade lake#Memory_Hierarchy|l1=Cascade Lake § Cache}} | ||
+ | The Xeon Gold 6240R features a larger non-default 35.75 MiB of [[L3]], a size that would normally be found on a 26-core part. | ||
+ | {{cache size | ||
+ | |l1 cache=1.5 MiB | ||
+ | |l1i cache=768 KiB | ||
+ | |l1i break=24x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=768 KiB | ||
+ | |l1d break=24x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=24 MiB | ||
+ | |l2 break=24x1 MiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=35.75 MiB | ||
+ | |l3 break=26x1.375 MiB | ||
+ | |l3 desc=11-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} |
Revision as of 01:01, 28 February 2020
Edit Values | |
Xeon Gold 6240R | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 6240R |
Market | Server |
Introduction | February 24, 2020 (announced) February 24, 2020 (launched) |
Release Price | $2,200.00 (tray) $2,205.00 (box) |
Shop | Amazon |
General Specs | |
Family | Xeon Gold |
Series | 6200 |
Locked | Yes |
Frequency | 2,400 MHz |
Turbo Frequency | 4,000 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 24 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Cascade Lake R |
Core Family | 6 |
Core Model | 85 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 24 |
Threads | 48 |
Max Memory | 1 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Interconnect | UPI |
Interconnect Links | 2 |
Interconnect Rate | 10.4 GT/s |
Electrical | |
TDP | 165 W |
Tcase | 0 °C – 90 °C |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Succession | |
Xeon Gold 6240R is a 64-bit 24-core x86 high performance server microprocessor introduced by Intel in early 2020. The Gold 6240R is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 2-way multiprocessing, sports 2 AVX-512 FMA units as well as two Ultra Path Interconnect links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 2.4 GHz with a TDP of 165 W and features a turbo boost frequency of up to 4.0 GHz.
Cache
- Main article: Cascade Lake § Cache
The Xeon Gold 6240R features a larger non-default 35.75 MiB of L3, a size that would normally be found on a 26-core part.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Xeon Gold 6240R - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Gold 6240R - Intel#pcie + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Lewisburg + |
clock multiplier | 24 + |
core count | 24 + |
core family | 6 + |
core model | 85 + |
core name | Cascade Lake R + |
designer | Intel + |
family | Xeon Gold + |
first announced | February 24, 2020 + |
first launched | February 24, 2020 + |
full page name | intel/xeon gold/6240r + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
has intel deep learning boost | true + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) + |
ldate | February 24, 2020 + |
main image | + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max cpu count | 2 + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
max memory channels | 6 + |
microarchitecture | Cascade Lake + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 6240R + |
name | Xeon Gold 6240R + |
number of avx-512 execution units | 2 + |
package | FCLGA-3647 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 2,200.00 (€ 1,980.00, £ 1,782.00, ¥ 227,326.00) + and $ 2,205.00 (€ 1,984.50, £ 1,786.05, ¥ 227,842.65) + |
release price (box) | $ 2,205.00 (€ 1,984.50, £ 1,786.05, ¥ 227,842.65) + |
release price (tray) | $ 2,200.00 (€ 1,980.00, £ 1,782.00, ¥ 227,326.00) + |
series | 6200 + |
smp interconnect | UPI + |
smp interconnect links | 2 + |
smp interconnect rate | 10.4 GT/s + |
smp max ways | 2 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2933 + |
tdp | 165 W (165,000 mW, 0.221 hp, 0.165 kW) + |
technology | CMOS + |
thread count | 48 + |
turbo frequency (1 core) | 4,000 MHz (4 GHz, 4,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |