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Difference between revisions of "nervana/nnp/nnp-t 1400"
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{{nervana title|NNP-T 1400}} | {{nervana title|NNP-T 1400}} | ||
| − | {{chip}} | + | {{chip |
| + | |name=NNP-T 1400 | ||
| + | |image=spring crest package (front).png | ||
| + | |back image=spring crest package (back).png | ||
| + | |caption=NPU with 4 HBM2 stacks | ||
| + | |designer=Intel | ||
| + | |manufacturer=TSMC | ||
| + | |model number=NNP-T 1400 | ||
| + | |market=Server | ||
| + | |first announced=November 12, 2019 | ||
| + | |first launched=November 12, 2019 | ||
| + | |family=NNP | ||
| + | |series=NNP-T | ||
| + | |frequency=1,100 MHz | ||
| + | |microarch=Spring Crest | ||
| + | |process=16 nm | ||
| + | |transistors=27,000,000,000 | ||
| + | |technology=CMOS | ||
| + | |die area=680 mm² | ||
| + | |core count=24 | ||
| + | |max memory=32 GiB | ||
| + | |smp interconnect=InterChip Link | ||
| + | |smp interconnect links=16 | ||
| + | |smp interconnect rate=28 GT/s | ||
| + | |power=175 W | ||
| + | |package name 1=intel,fcbga_3325 | ||
| + | }} | ||
'''NNP-T 1400''' is a [[neural processor]] designed by [[Intel Nervana]] and introduced in late 2019. Fabricated on TSMC [[16 nm process]] based on the {{nervana|Spring Crest|l=arch}} microarchitecture, the NNP-T 1400 has the full 24 {{nervana|Spring Crest#Tensor Processing Cluster (TPC)|TPCs|l=arch}} enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an [[OPC OAM|OAM]] [[accelerator card]] form factor and incorporates 32 GiB of [[HBM2]] memory. This NPU exposes 16 {{nervana|Spring Crest#InterChip Link (ICL)|inter-chip links|l=arch}} for scale-out capabilities. | '''NNP-T 1400''' is a [[neural processor]] designed by [[Intel Nervana]] and introduced in late 2019. Fabricated on TSMC [[16 nm process]] based on the {{nervana|Spring Crest|l=arch}} microarchitecture, the NNP-T 1400 has the full 24 {{nervana|Spring Crest#Tensor Processing Cluster (TPC)|TPCs|l=arch}} enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an [[OPC OAM|OAM]] [[accelerator card]] form factor and incorporates 32 GiB of [[HBM2]] memory. This NPU exposes 16 {{nervana|Spring Crest#InterChip Link (ICL)|inter-chip links|l=arch}} for scale-out capabilities. | ||
Revision as of 23:34, 31 January 2020
| Edit Values | |
| NNP-T 1400 | |
 | |
| NPU with 4 HBM2 stacks | |
| General Info | |
| Designer | Intel |
| Manufacturer | TSMC |
| Model Number | NNP-T 1400 |
| Market | Server |
| Introduction | November 12, 2019 (announced) November 12, 2019 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | NNP |
| Series | NNP-T |
| Frequency | 1,100 MHz |
| Microarchitecture | |
| Microarchitecture | Spring Crest |
| Process | 16 nm |
| Transistors | 27,000,000,000 |
| Technology | CMOS |
| Die | 680 mm² |
| Cores | 24 |
| Max Memory | 32 GiB |
| Multiprocessing | |
| Interconnect | InterChip Link |
| Interconnect Links | 16 |
| Interconnect Rate | 28 GT/s |
| Electrical | |
| Power dissipation | 175 W |
| Packaging | |
| Package | FCBGA-3325 (FCBGA) |
| Dimension | 60 mm × 60 mm |
| Contacts | 3325 |
 | |
NNP-T 1400 is a neural processor designed by Intel Nervana and introduced in late 2019. Fabricated on TSMC 16 nm process based on the Spring Crest microarchitecture, the NNP-T 1400 has the full 24 TPCs enabled along with 60 MiB of scratchpad memory and operates at up to 1.1 GHz. This chip comes in an OAM accelerator card form factor and incorporates 32 GiB of HBM2 memory. This NPU exposes 16 inter-chip links for scale-out capabilities.
Facts about "NNP-T 1400 - Intel Nervana"
| full page name | nervana/nnp/nnp-t 1400 + |
| instance of | microprocessor + |
| ldate | 1900 + |