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Difference between revisions of "samsung/microarchitectures/m5"
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=== Key changes from {{\\|M4}} === | === Key changes from {{\\|M4}} === | ||
{{empty section}} | {{empty section}} | ||
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+ | === Block Diagram === | ||
+ | ==== Individual Core ==== | ||
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+ | [[File:mongoose 5 block diagram.svg|900px]] |
Revision as of 09:51, 21 November 2019
Edit Values | |
Mongoose 5 µarch | |
General Info | |
Arch Type | CPU |
Designer | Samsung |
Manufacturer | Samsung |
Introduction | 2020 |
Process | 8 nm |
Succession | |
Exynos Mongoose 5 (M5) is the successor to the Mongoose 4, a 7 nm ARM microarchitecture designed by Samsung for their consumer electronics.
Contents
Process Technology
The M5 is planned to be fabricated on Samsung's 7 nm process (7LPP).
Compiler support
Compiler | Arch-Specific | Arch-Favorable |
---|---|---|
GCC | -mcpu=exynos-m5 |
-mtune=exynos-m5
|
LLVM | -mcpu=exynos-m5 |
-mtune=exynos-m5
|
Architecture
Key changes from M4
This section is empty; you can help add the missing info by editing this page. |
Block Diagram
Individual Core
Facts about "Exynos M5 - Microarchitectures - Samsung"
codename | Lion M5 + |
core count | 2 + |
designer | Samsung + |
first launched | 2020 + |
full page name | samsung/microarchitectures/m5 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.2 + |
manufacturer | Samsung + |
microarchitecture type | CPU + |
name | Lion M5 + |
pipeline stages | 16 + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |