Difference between revisions of "intel/core i5/i5-8200y"

	Edit Values
	Core i5-8200Y
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i5-8200Y
Market	Mobile
Shop	Amazon
	General Specs
Family	Core i5
Series	i5-8000
Locked	Yes
Frequency	1,300 MHz
Turbo Frequency	3,900 MHz (1 core),; 3,200 MHz (2 cores)
Bus type	OPI
Bus rate	4 GT/s
Clock multiplier	13
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Amber Lake
Platform	Amber Lake
Core Name	Amber Lake Y
Core Family	6
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	2
Threads	4
Max Memory	16 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	0.55 V-1.52 V
TDP	5 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
	Template:packages/intel/fcbga-1515

Revision as of 20:29, 15 July 2018

Core i5-8200Y is a 64-bit dual-core mid-range performance x86 mobile microprocessor set to be introduced by Intel in mid-2018. This chip, which is based on the Amber Lake microarchitecture, is fabricated on Intel's 14 nm process. The i5-8200Y operates at 1.3 GHz with a TDP of 5 W supporting a Turbo Boost frequency of 3.9 GHz. The processor supports up to 16 GiB of dual-channel ? memory and incorporates Intel's UHD Graphics 615 IGP operating at 300 MHz with a burst frequency of 1 GHz.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Amber Lake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	write-back

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		2x256 KiB	4-way set associative	write-back

L3$

4 MiB

4,096 KiB
4,194,304 B
0.00391 GiB

		2x2 MiB	12-way set associative	write-back

Memory controller

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	LPDDR3-?
Supports ECC	No
Max Mem	16 GiB
Controllers	1
Channels	2

Expansions

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	10
Configs	1x4, 2x2, 1x2+2x1, 4x1

Graphics

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

UHD Graphics 615

Designer

Intel

Execution Units

24

Max Displays

3

Max Memory

16 GiB

16,384 MiB
16,777,216 KiB
17,179,869,184 B

Frequency

300 MHz

0.3 GHz
300,000 KHz

Burst Frequency

1,000 MHz

1 GHz
1,000,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.4
OpenCL	2.0
DP	1.2
eDP	1.4
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel Clear Video

Intel Clear Video HD

[Edit] Coffee Lake (Gen9.5) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, MVC, Stereo	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main	5.1	2160p (4K)	Main	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High, Simple	3840x3840
VP8	Unified	Unified	N/A	0	Unified	1080p
VP9	0		2160p (4K)	0, 2	Unified	2160p (4K)

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
SSE4a	Streaming SIMD Extensions 4a
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
SST	Speed Shift Technology
TXT	Trusted Execution Technology (SMX)
vPro	Intel vPro
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions
MPX	Memory Protection Extensions
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
SMEP	OS Guard Technology
Flex Memory	Flex Memory Access
ISRT	Smart Response Technology
MWT	My WiFi Technology
SIPP	Stable Image Platform Program

@@ Line 18: / Line 18: @@
 |isa=x86-64
 |isa family=x86
-|microarch=Amber Lake Y
+|microarch=Amber Lake
 |platform=Amber Lake
 |core name=Amber Lake Y

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-8200Y - Intel#io +
base frequency	1,300 MHz (1.3 GHz, 1,300,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus type	OPI +
clock multiplier	13 +
core count	2 +
core family	6 +
core name	Amber Lake Y +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
family	Core i5 +
full page name	intel/core i5/i5-8200y +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Stable Image Platform Program +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel my wifi technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel speed shift technology	true +
has intel stable image platform program support	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	UHD Graphics 615 +
integrated gpu base frequency	300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory	16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description	12-way set associative +
l3$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldate	1900 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory channels	2 +
max pcie lanes	10 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Amber Lake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i5-8200Y +
name	Core i5-8200Y +
platform	Amber Lake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
series	i5-8000 +
smp max ways	1 +
supported memory type	LPDDR3-? +
tdp	5 W (5,000 mW, 0.00671 hp, 0.005 kW) +
technology	CMOS +
thread count	4 +
turbo frequency (1 core)	3,900 MHz (3.9 GHz, 3,900,000 kHz) +
turbo frequency (2 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Revision as of 20:29, 15 July 2018

Contents

Cache

Memory controller

Expansions

Graphics

Features