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Difference between revisions of "graphcore/microarchitectures/colossus"
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{{graphcore title|Colossus|l=arch}} | {{graphcore title|Colossus|l=arch}} | ||
− | {{microarchitecture}} | + | {{microarchitecture |
+ | |atype=NPU | ||
+ | |name=Colossus | ||
+ | |designer=Graphcore | ||
+ | |manufacturer=TSMC | ||
+ | }} | ||
'''Colossus''' is a [[16 nm]] microarchitecture for high-performance [[neural processors]] designed by [[Graphcore]] set to be introduced in late-2018. | '''Colossus''' is a [[16 nm]] microarchitecture for high-performance [[neural processors]] designed by [[Graphcore]] set to be introduced in late-2018. | ||
== Etymology == | == Etymology == | ||
Codename Colossus was chosen in honor of [[Tommy Flowers]] and the [[Colossus]] computer. | Codename Colossus was chosen in honor of [[Tommy Flowers]] and the [[Colossus]] computer. |
Revision as of 11:17, 13 June 2018
Edit Values | |
Colossus µarch | |
General Info | |
Arch Type | NPU |
Designer | Graphcore |
Manufacturer | TSMC |
Colossus is a 16 nm microarchitecture for high-performance neural processors designed by Graphcore set to be introduced in late-2018.
Etymology
Codename Colossus was chosen in honor of Tommy Flowers and the Colossus computer.
Facts about "Colossus - Graphcore"
codename | Colossus + |
designer | Graphcore + |
first launched | 2018 + |
full page name | graphcore/microarchitectures/colossus + |
instance of | microarchitecture + |
manufacturer | TSMC + |
name | Colossus + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |