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Difference between revisions of "amd/epyc embedded/3251"
< amd‎ | epyc embedded

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{{unknown features}}
 
{{unknown features}}
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== Cache ==
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{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
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{{cache size
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|l1 cache=768 KiB
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|l1i cache=512 KiB
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|l1i break=8x64 KiB
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|l1i desc=4-way set associative
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|l1d cache=256 KiB
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|l1d break=8x32 KiB
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|l1d desc=8-way set associative
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|l1d policy=write-back
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|l2 cache=4 MiB
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|l2 break=8x512 KiB
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|l2 desc=8-way set associative
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|l2 policy=write-back
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|l3 cache=16 MiB
 +
|l3 break=2x8 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 +
}}

Revision as of 15:29, 22 February 2018

Edit Values
EPYC Embedded 3251
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number3251
MarketServer, Embedded
IntroductionFebruary 21, 2018 (announced)
February 21, 2018 (launched)
ShopAmazon
General Specs
FamilyEPYC Embedded
Series3000
Frequency2,500 MHz
Turbo Frequency3,100 MHz (1 core)
Clock multiplier25
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen
Core NameSnowy Owl
Process14 nm
Transistors4,800,000,000
TechnologyCMOS
Die213 mm²
Word Size64 bit
Cores8
Threads16
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP50 W
Tjunction0 °C – 105 °C
Packaging
Template:packages/amd/package sp4r2

EPYC Embedded 3251 is a 64-bit octa-core x86 embedded microprocessor introduced by AMD in early 2018 for dense servers and edge devices. Fabricated on a 14 nm process based on the Zen microarchitecture, this chip operates at 2.5 GHz with a TDP of 50 W and a turbo frequency of 3.1 GHz. The 3251 supports up to 512 GiB of dual-channel DDR4-2666 ECC memory.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$512 KiB
524,288 B
0.5 MiB
8x64 KiB4-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back
L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  8x512 KiB8-way set associativewrite-back
L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  2x8 MiB16-way set associativewrite-back
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/epyc_embedded/3251&oldid=74331"
Facts about "EPYC Embedded 3251 - AMD"
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EPYC Embedded 3251 - AMD#pcie +
base frequency2,500 MHz (2.5 GHz, 2,500,000 kHz) +
clock multiplier25 +
core count8 +
core family23 +
core model1 +
core nameSnowy Owl +
core steppingB2 +
cpuid0x00800F12 +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
familyEPYC Embedded +
first announcedFebruary 21, 2018 +
first launchedFebruary 21, 2018 +
full page nameamd/epyc embedded/3251 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd secure encrypted virtualization technologytrue +
has amd secure memory encryption technologytrue +
has amd sensemi technologytrue +
has amd transparent secure memory encryption technologytrue +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multipliertrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description4-way set associative +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description16-way set associative +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
last order2028 +
ldateFebruary 21, 2018 +
manufacturerGlobalFoundries +
market segmentServer + and Embedded +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth39.74 GiB/s (40,693.283 MiB/s, 42.67 GB/s, 42,670 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels2 +
max sata ports8 +
max usb ports4 +
microarchitectureZen +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number3251 +
nameEPYC Embedded 3251 +
packageSP4r2 +
part numberPE3251BGR88AF +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 315.00 (€ 283.50, £ 255.15, ¥ 32,548.95) +
series3000 +
smp max ways1 +
supported memory typeDDR4-2666 +
tdp55 W (55,000 mW, 0.0738 hp, 0.055 kW) +
technologyCMOS +
thread count16 +
transistor count4,800,000,000 +
turbo frequency (1 core)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
turbo frequency (8 cores)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +