Semiconductor & Computer Engineering
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Difference between revisions of "amd/cores/milan"
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|no image=No | |no image=No | ||
|developer=AMD | |developer=AMD | ||
| − | |manufacturer= | + | |manufacturer=TSMC |
|first announced=May 16, 2017 | |first announced=May 16, 2017 | ||
|isa=x86-64 | |isa=x86-64 | ||
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|predecessor=Rome | |predecessor=Rome | ||
|predecessor link=amd/cores/rome | |predecessor link=amd/cores/rome | ||
| + | |successor=Genoa | ||
| + | |successor link=amd/cores/genoa | ||
|succession=Yes | |succession=Yes | ||
}} | }} | ||
'''Milan''' is the codename for [[AMD]]'s high-performance enterprise-level server [[multiprocessors]] based on the {{amd|Zen 3|l=arch}} microarchitecture serving as a successor to {{\\|Rome}}. Milan-based chips are set to be fabricated on GlobalFoundries' [[7 nm process]]. | '''Milan''' is the codename for [[AMD]]'s high-performance enterprise-level server [[multiprocessors]] based on the {{amd|Zen 3|l=arch}} microarchitecture serving as a successor to {{\\|Rome}}. Milan-based chips are set to be fabricated on GlobalFoundries' [[7 nm process]]. | ||
Revision as of 12:04, 24 October 2018
| Edit Values | |
| Milan | |
| General Info | |
| Designer | AMD |
| Manufacturer | TSMC |
| Introduction | May 16, 2017 (announced) |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Zen 3 |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 7 nm 0.007 μm 7.0e-6 mm |
| Technology | CMOS |
| Succession | |
Milan is the codename for AMD's high-performance enterprise-level server multiprocessors based on the Zen 3 microarchitecture serving as a successor to Rome. Milan-based chips are set to be fabricated on GlobalFoundries' 7 nm process.
Facts about "Milan - Cores - AMD"
| designer | AMD + |
| first announced | May 16, 2017 + |
| instance of | core + |
| isa | x86-64 + |
| manufacturer | TSMC + |
| microarchitecture | Zen 3 + |
| name | Milan + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |