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Difference between revisions of "intel/microarchitectures/tiger lake"
(https://www.fool.com/investing/2017/07/14/key-detail-of-intel-corporation-tiger-lake-process.aspx "Per a LinkedIn profile of a current Intel employee, the company's Tiger Lake family of processors will include the company's Gen. 12 graphics architecture.") |
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{{intel title|Tigerlake|arch}} | {{intel title|Tigerlake|arch}} | ||
{{microarchitecture | {{microarchitecture | ||
| − | | atype | + | |atype=CPU |
| − | | name | + | |name=Tigerlake |
| − | | designer | + | |designer=Intel |
| − | | manufacturer | + | |manufacturer=Intel |
| − | | introduction | + | |introduction=2019 |
| − | + | |process=10 nm | |
| − | | process | + | |predecessor=Icelake |
| − | + | |predecessor link=intel/microarchitectures/icelake | |
| − | + | |successor=Sapphire Rapids | |
| − | | predecessor | + | |successor link=intel/microarchitectures/sapphire rapids |
| − | | predecessor link = intel/microarchitectures/icelake | + | |succession=Yes |
| − | | successor | ||
| − | | successor link | ||
}} | }} | ||
'''Tigerlake''' ('''TGL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. Tigerlake is the "Optimization" microarchitecture as part of Intel's {{intel|PAO}} model. | '''Tigerlake''' ('''TGL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. Tigerlake is the "Optimization" microarchitecture as part of Intel's {{intel|PAO}} model. | ||
Revision as of 08:34, 28 September 2017
| Edit Values | |
| Tigerlake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2019 |
| Process | 10 nm |
| Succession | |
Tigerlake (TGL) is a planned microarchitecture by Intel as a successor to Icelake. Tigerlake is expected to be fabricated using a 10 nm process. Tigerlake is the "Optimization" microarchitecture as part of Intel's PAO model.
Process Technology
- Main article: Cannonlake § Process Technology
Tigerlake is set to use the same 10 nm process that was designed for Cannonlake.
Architecture
Not much is known about Tigerlake's architecture.
Key changes from Icelake
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Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
See also
Facts about "Tiger Lake - Microarchitectures - Intel"
| codename | Tigerlake + |
| designer | Intel + |
| first launched | 2019 + |
| full page name | intel/microarchitectures/tiger lake + |
| instance of | microarchitecture + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Tigerlake + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |