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Difference between revisions of "intel/xeon platinum/8170m"
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'''Xeon Platinum 8170M''' is a {{arch|64}} [[26-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8170M, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 165 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 1.5 TiB of hexa-channel DDR4-2666 ECC memory. | '''Xeon Platinum 8170M''' is a {{arch|64}} [[26-core]] [[x86]] multi-socket highest performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8170M, which is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 2.1 GHz with a TDP of 165 W and a {{intel|turbo boost}} frequency of up to 3.7 GHz, supports up 1.5 TiB of hexa-channel DDR4-2666 ECC memory. | ||
| − | == | + | == Cache == |
| − | {{ | + | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} |
| − | | | + | {{cache size |
| − | | | + | |l1 cache=1.625 MiB |
| − | + | |l1i cache=832 KiB | |
| − | + | |l1i break=26x32 KiB | |
| − | + | |l1i desc=8-way set associative | |
| − | + | |l1d cache=832 KiB | |
| − | + | |l1d break=26x32 KiB | |
| − | + | |l1d desc=8-way set associative | |
| − | + | |l1d policy=write-back | |
| − | + | |l2 cache=26 MiB | |
| − | + | |l2 break=26x1 MiB | |
| − | + | |l2 desc=16-way set associative | |
| − | + | |l2 policy=write-back | |
| − | + | |l3 cache=35.75 MiB | |
| − | + | |l3 break=26x1.375 MiB | |
| − | + | |l3 desc=11-way set associative | |
| − | + | |l3 policy=write-back | |
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Revision as of 03:16, 12 July 2017
Template:mpu Xeon Platinum 8170M is a 64-bit 26-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8170M, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.1 GHz with a TDP of 165 W and a turbo boost frequency of up to 3.7 GHz, supports up 1.5 TiB of hexa-channel DDR4-2666 ECC memory.
Cache
- Main article: Skylake § Cache
|
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Xeon Platinum 8170M - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8170M - Intel#io + |
| base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
| chipset | Lewisburg + |
| clock multiplier | 21 + |
| core count | 26 + |
| core family | 6 + |
| core name | Skylake SP + |
| core stepping | H0 + |
| cpuid | 0x50654 + |
| designer | Intel + |
| family | Xeon Platinum + |
| first announced | April 25, 2017 + |
| first launched | July 11, 2017 + |
| full page name | intel/xeon platinum/8170m + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel speed shift technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 1,664 KiB (1,703,936 B, 1.625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 832 KiB (851,968 B, 0.813 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 832 KiB (851,968 B, 0.813 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 26 MiB (26,624 KiB, 27,262,976 B, 0.0254 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) + |
| ldate | July 11, 2017 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + |
| max case temperature | 362.15 K (89 °C, 192.2 °F, 651.87 °R) + |
| max cpu count | 8 + |
| max dts temperature | 99 °C + |
| max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
| max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
| max memory channels | 6 + |
| max pcie lanes | 48 + |
| microarchitecture | Skylake (server) + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min dts temperature | 0 °C + |
| model number | 8170M + |
| name | Xeon Platinum 8170M + |
| package | FCLGA-3647 + |
| part number | CD8067303319201 + |
| platform | Purley + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 10,409.00 (€ 9,368.10, £ 8,431.29, ¥ 1,075,561.97) + |
| s-spec | SR3BD + |
| s-spec (qs) | QMQ3 + |
| series | 8000 + |
| smp max ways | 8 + |
| socket | Socket P + and LGA-3647 + |
| supported memory type | DDR4-2666 + |
| tdp | 165 W (165,000 mW, 0.221 hp, 0.165 kW) + |
| technology | CMOS + |
| thread count | 52 + |
| turbo frequency (1 core) | 3,700 MHz (3.7 GHz, 3,700,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |