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'''VY86C610''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1993]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core) which was manufactured on [[VLSI Technology|VLSI]]'s [[0.8 µm process]] and operated at 20 MHz.
 
'''VY86C610''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1993]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core) which was manufactured on [[VLSI Technology|VLSI]]'s [[0.8 µm process]] and operated at 20 MHz.
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This processor, unlike its {{armh|ARM60|l=core}} variant which only incorporate the bare bone core, includes a cache, write buffer, and a [[memory management unit]].
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== Cache ==
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{{main|arm_holdings/microarchitectures/arm6#Memory_Hierarchy|l1=ARM6 § Cache}}
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{{cache size
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|l1 cache=4 KiB
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|l1 break=1x4 KiB
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|l1 desc=64-way set associative
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|l1 policy=write-through
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}}
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== Datasheet ==
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* [[:File:vy86c610.pdf|VY86C610 Datasheet]], September 1993

Revision as of 12:40, 1 July 2017

Template:mpu VY86C610 is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1993. This processor is based on the ARM6 microarchitecture (ARM610 core) which was manufactured on VLSI's 0.8 µm process and operated at 20 MHz.

This processor, unlike its ARM60 variant which only incorporate the bare bone core, includes a cache, write buffer, and a memory management unit.

Cache

Main article: ARM6 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$4 KiB
4,096 B
0.00391 MiB
  1x4 KiB64-way set associativewrite-through

Datasheet

Retrieved from "https://en.wikichip.org/w/index.php?title=vti/vl86cx/vy86c610&oldid=49803"
Facts about "VY86C610 - VTI"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
VY86C610 - VTI#package +
base frequency20 MHz (0.02 GHz, 20,000 kHz) + and 25 MHz (0.025 GHz, 25,000 kHz) +
chipsetMEMC +, VIDC + and IOC +
core count1 +
core nameARM610 +
core voltage5 V (50 dV, 500 cV, 5,000 mV) +
core voltage tolerance5 % +
designerARM Holdings +
familyVL86Cx +
first launched1993 +
full page namevti/vl86cx/vy86c610 +
instance ofmicroprocessor +
isaARMv3 +
isa familyARM +
l1$ description64-way set associative +
l1$ size4 KiB (4,096 B, 0.00391 MiB) +
ldate1993 +
manufacturerVLSI Technology +
market segmentEmbedded + and Desktop +
max ambient temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory address0xFFFFFFFF +
max storage temperature123.15 K (-150 °C, -238 °F, 221.67 °R) +
microarchitectureARM6 +
min ambient temperature263.15 K (-10 °C, 14 °F, 473.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberVY86C610 +
nameVY86C610 +
packageTQFP-144 +
part numberVY86C61020BC + and VY86C610-25 +
process800 nm (0.8 μm, 8.0e-4 mm) +
release price$ 25.00 (€ 22.50, £ 20.25, ¥ 2,583.25) +
smp max ways1 +
technologyCMOS +
thread count1 +
transistor count358,931 +
word size32 bit (4 octets, 8 nibbles) +