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Difference between revisions of "vti/vl86cx/vy86c610"
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'''VY86C610''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1993]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core) which was manufactured on [[VLSI Technology|VLSI]]'s [[0.8 µm process]] and operated at 20 MHz. | '''VY86C610''' is a {{arch|32}} [[ARM]] microprocessor designed by [[arm holdings|ARM]] and introduce by [[vti|VTI]] in [[1993]]. This processor is based on the {{armh|ARM6|l=arch}} microarchitecture ({{armh|ARM610|l=core}} core) which was manufactured on [[VLSI Technology|VLSI]]'s [[0.8 µm process]] and operated at 20 MHz. | ||
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+ | This processor, unlike its {{armh|ARM60|l=core}} variant which only incorporate the bare bone core, includes a cache, write buffer, and a [[memory management unit]]. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|arm_holdings/microarchitectures/arm6#Memory_Hierarchy|l1=ARM6 § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=4 KiB | ||
+ | |l1 break=1x4 KiB | ||
+ | |l1 desc=64-way set associative | ||
+ | |l1 policy=write-through | ||
+ | }} | ||
+ | |||
+ | == Datasheet == | ||
+ | * [[:File:vy86c610.pdf|VY86C610 Datasheet]], September 1993 |
Revision as of 13:40, 1 July 2017
Template:mpu VY86C610 is a 32-bit ARM microprocessor designed by ARM and introduce by VTI in 1993. This processor is based on the ARM6 microarchitecture (ARM610 core) which was manufactured on VLSI's 0.8 µm process and operated at 20 MHz.
This processor, unlike its ARM60 variant which only incorporate the bare bone core, includes a cache, write buffer, and a memory management unit.
Cache
- Main article: ARM6 § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Datasheet
- VY86C610 Datasheet, September 1993
Facts about "VY86C610 - VTI"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | VY86C610 - VTI#package + |
base frequency | 20 MHz (0.02 GHz, 20,000 kHz) + and 25 MHz (0.025 GHz, 25,000 kHz) + |
chipset | MEMC +, VIDC + and IOC + |
core count | 1 + |
core name | ARM610 + |
core voltage | 5 V (50 dV, 500 cV, 5,000 mV) + |
core voltage tolerance | 5 % + |
designer | ARM Holdings + |
family | VL86Cx + |
first launched | 1993 + |
full page name | vti/vl86cx/vy86c610 + |
instance of | microprocessor + |
isa | ARMv3 + |
isa family | ARM + |
l1$ description | 64-way set associative + |
l1$ size | 4 KiB (4,096 B, 0.00391 MiB) + |
ldate | 1993 + |
manufacturer | VLSI Technology + |
market segment | Embedded + and Desktop + |
max ambient temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max memory address | 0xFFFFFFFF + |
max storage temperature | 123.15 K (-150 °C, -238 °F, 221.67 °R) + |
microarchitecture | ARM6 + |
min ambient temperature | 263.15 K (-10 °C, 14 °F, 473.67 °R) + |
min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
model number | VY86C610 + |
name | VY86C610 + |
package | TQFP-144 + |
part number | VY86C61020BC + and VY86C610-25 + |
process | 800 nm (0.8 μm, 8.0e-4 mm) + |
release price | $ 25.00 (€ 22.50, £ 20.25, ¥ 2,583.25) + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 358,931 + |
word size | 32 bit (4 octets, 8 nibbles) + |