Semiconductor & Computer Engineering
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Difference between revisions of "loongson/godson 2/2g"
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| core stepping = | | core stepping = | ||
| process = 65 nm | | process = 65 nm | ||
| − | | transistors = | + | | transistors = 100,000,000 |
| technology = CMOS | | technology = CMOS | ||
| die area = 53.54 mm² | | die area = 53.54 mm² | ||
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'''Godson-2G''' is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late-[[2010]], the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on [[STMicroelectronics]]' [[65 nm process]]. | '''Godson-2G''' is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late-[[2010]], the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on [[STMicroelectronics]]' [[65 nm process]]. | ||
| + | |||
| + | == Die Shot == | ||
| + | * [[65 nm process]] | ||
| + | * 100,000,000 transistors | ||
| + | * 53.54 mm² die size | ||
| + | [[File:godson-2g die shot.png|700px]] | ||
== References == | == References == | ||
* Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231. | * Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231. | ||
Revision as of 17:52, 18 March 2017
Template:mpu Godson-2G is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late-2010, the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on STMicroelectronics' 65 nm process.
Die Shot
- 65 nm process
- 100,000,000 transistors
- 53.54 mm² die size
References
- Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231.
Facts about "Godson-2G - Loongson"
| base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
| bus speed | 400 MHz (0.4 GHz, 400,000 kHz) + |
| bus type | HyperTransport 1.0 + |
| clock multiplier | 2.5 + |
| core count | 1 + |
| core name | GS464 + |
| designer | Loongson + |
| die area | 53.54 mm² (0.083 in², 0.535 cm², 53,540,000 µm²) + |
| family | Godson 2 + |
| first announced | April 2009 + |
| first launched | November 2010 + |
| full page name | loongson/godson 2/2g + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| isa | MIPS64 + |
| isa family | MIPS + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| ldate | November 2010 + |
| main image |  + |
| main image caption | Godson-2G chip + |
| manufacturer | STMicroelectronics + |
| market segment | Desktop + |
| max cpu count | 1 + |
| max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | GS464 + |
| model number | 2G + |
| name | Godson-2G + |
| power dissipation | 3 W (3,000 mW, 0.00402 hp, 0.003 kW) + |
| process | 65 nm (0.065 μm, 6.5e-5 mm) + |
| series | Godson 2 + |
| smp max ways | 1 + |
| supported memory type | DDR3-800 + |
| technology | CMOS + |
| thread count | 1 + |
| transistor count | 100,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
