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Difference between revisions of "amd/athlon mp/amp1900dms3c"
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== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
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{{cache info
+
{{cache size
 +
|l1 cache=128 KiB
 
|l1i cache=64 KiB
 
|l1i cache=64 KiB
 
|l1i break=1x64 KiB
 
|l1i break=1x64 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
−
|l1i extra=
+
|l1i policy=
 
|l1d cache=64 KiB
 
|l1d cache=64 KiB
 
|l1d break=1x64 KiB
 
|l1d break=1x64 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
−
|l1d extra=
+
|l1d policy=
 
|l2 cache=256 KiB
 
|l2 cache=256 KiB
 
|l2 break=1x256 KiB
 
|l2 break=1x256 KiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
−
|l2 extra=
+
|l2 policy=
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|l3 cache=
 
−
|l3 break=
 
−
|l3 desc=
 
−
|l3 extra=
 
 
}}
 
}}
  

Revision as of 15:41, 26 November 2016

Template:mpu The Athlon MP 1900+ (OPN AMP1900DMS3C) based on the Palomino core was a 32-bit x86 multiprocessor developed by AMD and introduced in late 2001 for the server and workstation market. This MPU operated at 1.6 GHz with a FSB transfer rate of 266 MT/s (x12 multiplier). This processor, which was based on the K7 microarchitecture, was manufactured on a mature 180 nm copper interconnect technology at AMD's Fab 30 in Dresden, Germany.

Cache

Main article: K7 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
1x64 KiB2-way set associative 
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB16-way set associative 

Graphics

This MPU has no integrated graphics processing unit.

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
x86-1616-bit x86
x86-3232-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
SmartMPSmartMP Technology
  • Advanced Configuration and Power Interface
    • Halt State
    • Stop Grant State

Documents

Datasheets

Others

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon_mp/amp1900dms3c&oldid=29114"
Facts about "Athlon MP 1900+ - AMD"
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Athlon MP 1900+ - AMD#package +
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
bus rate266 MT/s (0.266 GT/s, 266,000 kT/s) +
bus speed133 MHz (0.133 GHz, 133,000 kHz) +
bus typeFSB +
chipsetAMD-760MP +
clock multiplier12 +
core count1 +
core family6 +
core model6 +
core namePalomino +
core stepping2 +
core voltage1.75 V (17.5 dV, 175 cV, 1,750 mV) +
cpuid662 +
designerAMD +
die area128 mm² (0.198 in², 1.28 cm², 128,000,000 µm²) +
familyAthlon MP +
first announcedDecember 12, 2001 +
first launchedDecember 12, 2001 +
full page nameamd/athlon mp/amp1900dms3c +
has amd amd-v technologytrue +
has featureACPI +, Halt State + and Stop Grant State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateDecember 12, 2001 +
manufacturerAMD +
market segmentServer +
max case temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count2 +
max junction temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberAthlon MP 1900+ +
nameAMD Athlon MP 1900+ +
packageOPGA-453 +
part numberAMP1900DMS3C +
platformAthlon MP +
process180 nm (0.18 μm, 1.8e-4 mm) +
release price$ 319.00 (€ 287.10, £ 258.39, ¥ 32,962.27) +
smp max ways2 +
tdp66 W (66,000 mW, 0.0885 hp, 0.066 kW) +
tdp (typical)58.9 W (58,900 mW, 0.079 hp, 0.0589 kW) +
technologyCMOS +
thread count1 +
transistor count37,500,000 +
word size32 bit (4 octets, 8 nibbles) +