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Difference between revisions of "amd/athlon mp/ahx1200ans3b"
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− | '''Athlon MP 1200''' (OPN ''AHX1200ANS3B'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for the server and workstation market. This particular model, which operated at 1.2 GHz, had a lower FSB operating at 100 MHz (for an effective transfer rate of 200 MT/s) and operated at higher nominal voltage of 1.8 V. | + | '''Athlon MP 1200''' (OPN ''AHX1200ANS3B'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for the server and workstation market. This particular model, which operated at 1.2 GHz, had a lower FSB operating at 100 MHz (for an effective transfer rate of 200 MT/s) and operated at higher nominal voltage of 1.8 V. This processor, which was based on the {{amd|K7|K7 microarchitecture|l=arch}}, was manufactured on a mature [[180 nm]] copper interconnect technology at AMD's Fab 30 in Dresden, Germany. |
Revision as of 00:17, 17 November 2016
Template:mpu Athlon MP 1200 (OPN AHX1200ANS3B) based on the Palomino core was a 32-bit x86 multiprocessor developed by AMD and introduced in 2001 for the server and workstation market. This particular model, which operated at 1.2 GHz, had a lower FSB operating at 100 MHz (for an effective transfer rate of 200 MT/s) and operated at higher nominal voltage of 1.8 V. This processor, which was based on the K7 microarchitecture, was manufactured on a mature 180 nm copper interconnect technology at AMD's Fab 30 in Dresden, Germany.