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Difference between revisions of "intel/xeon e5/e5-2603 v4"
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| socket 0 type      = LGA
 
| socket 0 type      = LGA
 
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The '''Xeon E5-2603 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for basic 2S environments (1U square form factor). Operating at 1.7 GHz with a {{intel|turbo boost}} frequency of 3.2 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).
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The '''Xeon E5-2603 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for basic 2S environments (1U square form factor). Operating at 1.7 GHz with no {{intel|turbo boost}} support, this MPU has a TDP of 85 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).  This specific model has no hyper-threading support.
  
 
== Cache ==
 
== Cache ==
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| max memory        = 1,536 GiB
 
| max memory        = 1,536 GiB
 
| pae                = 46 bit
 
| pae                = 46 bit
 +
}}
 +
 +
== Features ==
 +
{{mpu features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        = Yes
 +
| vpro        = Yes
 +
| ht          =
 +
| tbt1        =
 +
| tbt2        =
 +
| tbmt3      =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        =
 +
| sgx        =
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard    = Yes
 +
| intel at    =
 +
| intel ipt  =
 
}}
 
}}

Revision as of 19:05, 3 November 2016

Template:mpu The Xeon E5-2603 v4 is a 64-bit hexa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for basic 2S environments (1U square form factor). Operating at 1.7 GHz with no turbo boost support, this MPU has a TDP of 85 W and is manufactured on a 14 nm process (based on Broadwell). This specific model has no hyper-threading support.

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core, write-back)
L1D$ 192 KiB
196,608 B
0.188 MiB
6x32 KiB 8-way set associative (per core, write-back)
L2$ 1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
6x256 KiB 8-way set associative (per core, write-back)
L3$ 15 MiB
15,360 KiB
15,728,640 B
0.0146 GiB
6x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-1866
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 55.63 GiB/s
Bandwidth (single) 13.91 GiB/s
Bandwidth (dual) 27.82 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Features

Template:mpu features

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Facts about "Xeon E5-2603 v4 - Intel"
RDF feed
l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description8-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description8-way set associative +
l2$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l3$ description20-way set associative +
l3$ size15 MiB (15,360 KiB, 15,728,640 B, 0.0146 GiB) +