Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "phytium/feiteng/ft-1500a-16"
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| Line 14: | Line 14: | ||
| part number 3 = | | part number 3 = | ||
| market = Workstation | | market = Workstation | ||
| − | | first announced = | + | | first announced = March 26, 2015 |
| first launched = July 26, 2016 | | first launched = July 26, 2016 | ||
| last order = | | last order = | ||
| Line 84: | Line 84: | ||
== Cache == | == Cache == | ||
{{cache info | {{cache info | ||
| − | |l1i cache= | + | |l1i cache=512 KB |
| − | |l1i break= | + | |l1i break=16x32 KB |
|l1i desc= | |l1i desc= | ||
|l1i extra=(per core) | |l1i extra=(per core) | ||
| − | |l1d cache= | + | |l1d cache=512 KB |
| − | |l1d break= | + | |l1d break=15x32 KB |
|l1d desc= | |l1d desc= | ||
|l1d extra=(per core) | |l1d extra=(per core) | ||
Revision as of 08:36, 8 September 2016
Template:mpu FT-1500A/16 is a hexadeca-core 64-bit ARM system on chip developed by Phytium and introduced in 2016. Manufactured on a 28 nm process, the chip operates at 1.5 GHz and dissipates a maximum of 35 W. This chip is designed for server, communication, and infrastructure applications.
Cache
| Cache Info [Edit Values] | ||
| L1I$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
16x32 KB (per core) |
| L1D$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
15x32 KB (per core) |
| L2$ | 8 MB "MB" is not declared as a valid unit of measurement for this property. |
16x512 KB |
| L3$ | 8 MB "MB" is not declared as a valid unit of measurement for this property. |
|
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3-1600 |
| Controllers | 4 |
| ECC Support | No |
| Max bandwidth | 51.2 GB/s |
Expansions
Networking
- 2x Gigabit Ethernet Interfaces
| Networking | |
| 10Base-T | Yes |
| 100Base-T | Yes |
| 1000Base-T | Yes |
Documents
Datasheet