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Difference between revisions of "arm holdings/microarchitectures/cortex-x2"
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|designer=ARM Holdings | |designer=ARM Holdings | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
| + | |predecessor=Cortex-X1 | ||
| + | |predecessor link=arm holdings/microarchitectures/cortex-x1 | ||
|successor=Cortex-X3 | |successor=Cortex-X3 | ||
|successor link=arm holdings/microarchitectures/cortex-x3 | |successor link=arm holdings/microarchitectures/cortex-x3 | ||
Revision as of 14:27, 4 July 2022
| Edit Values | |
| Cortex-X2 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | ARM Holdings |
| Manufacturer | TSMC |
| Succession | |
| Contemporary | |
| Cortex-A710 | |
Cortex-X2 is the successor to the Cortex-X1, a performance-enhanced version of the Cortex-A710, low-power high-performance ARM microarchitecture designed by Arm for the mobile market.
Facts about "Cortex-X2 (Matterhorn-ELP) - Microarchitectures - ARM"
| codename | Cortex-X2 (Matterhorn-ELP) + |
| core count | 1 +, 2 +, 4 +, 6 +, 8 +, 10 + and 12 + |
| designer | ARM Holdings + |
| first launched | 2021 + |
| full page name | arm holdings/microarchitectures/cortex-x2 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv9.0-A + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Cortex-X2 (Matterhorn-ELP) + |
| pipeline stages | 288 + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) + and 5 nm (0.005 μm, 5.0e-6 mm) + |