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Difference between revisions of "intel/xeon w/w-2140b"
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(I have this CPU & the added turbos are what HWiNFO is telling me.) |
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|freq_1=4,200 MHz | |freq_1=4,200 MHz | ||
|freq_2=4,200 MHz | |freq_2=4,200 MHz | ||
− | |freq_3= | + | |freq_3=4,000 MHz |
− | |freq_4= | + | |freq_4=4,000 MHz |
− | |freq_5= | + | |freq_5=3,900 MHz |
− | |freq_6= | + | |freq_6=3,900 MHz |
|freq_7=3,900 MHz | |freq_7=3,900 MHz | ||
|freq_8=3,900 MHz | |freq_8=3,900 MHz | ||
+ | |freq_avx2_1=3,800 MHz | ||
+ | |freq_avx2_2=3,800 MHz | ||
+ | |freq_avx2_3=3,600 MHz | ||
+ | |freq_avx2_4=3,600 MHz | ||
+ | |freq_avx2_5=3,600 MHz | ||
+ | |freq_avx2_6=3,600 MHz | ||
+ | |freq_avx2_7=3,600 MHz | ||
+ | |freq_avx2_8=3,600 MHz | ||
+ | |freq_avx512_1=3,800 MHz | ||
+ | |freq_avx512_2=3,800 MHz | ||
+ | |freq_avx512_3=3,600 MHz | ||
+ | |freq_avx512_4=3,600 MHz | ||
+ | |freq_avx512_5=3,300 MHz | ||
+ | |freq_avx512_6=3,300 MHz | ||
+ | |freq_avx512_7=3,300 MHz | ||
+ | |freq_avx512_8=3,300 MHz | ||
}} | }} |
Latest revision as of 03:03, 5 January 2022
Edit Values | |
Xeon W-2140B | |
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General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | W-2140B |
Market | Workstation |
Introduction | June 5, 2017 (announced) December 21, 2017 (launched) |
Shop | Amazon |
General Specs | |
Family | Xeon W |
Series | W-2000 |
Locked | Yes |
Frequency | 3,200 MHz |
Turbo Frequency | 4,200 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 32 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Basin Falls |
Core Name | Skylake W |
Core Family | 6 |
Core Stepping | U0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 8 |
Threads | 16 |
Max Memory | 512 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Packaging | |
Package | FCLGA-2066 (LGA) |
Dimension | 52.5 mm × 45 mm |
Pitch | 1.016 mm |
Contacts | 2066 |
Socket | Socket R4 |
W-2140B is a 64-bit octa-core x86 enterprise performance workstation microprocessor introduced by Intel in 2017. This processors, which is fabricated on an enhanced 14nm+ process based on the Skylake server microarchitecture, operates at 3.2 GHz with a TDP of ? W and a turbo boost frequency of up to 4.2 GHz. This chip supports up to 512 GiB of quad-channel DDR4-2666 ECC memory.
This specific model appears to be a special model for Apple for their iMac Pros.
Cache[edit]
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Frequencies[edit]
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||
---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | ||
Normal | 3,200 MHz | 4,200 MHz | 4,200 MHz | 4,000 MHz | 4,000 MHz | 3,900 MHz | 3,900 MHz | 3,900 MHz | 3,900 MHz |
AVX2 | 3,800 MHz | 3,800 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | |
AVX512 | 3,800 MHz | 3,800 MHz | 3,600 MHz | 3,600 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz |
Facts about "Xeon W-2140B - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-2140B - Intel#pcie + |
base frequency | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 32 + |
core count | 8 + |
core family | 6 + |
core name | Skylake W + |
core stepping | U0 + |
designer | Intel + |
family | Xeon W + |
first announced | June 5, 2017 + |
first launched | December 21, 2017 + |
full page name | intel/xeon w/w-2140b + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) + |
ldate | 3000 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Workstation + |
max cpu count | 1 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
max memory channels | 4 + |
microarchitecture | Skylake (server) + |
model number | W-2140B + |
name | Xeon W-2140B + |
number of avx-512 execution units | 2 + |
package | FCLGA-2066 + |
platform | Basin Falls + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | W-2000 + |
smp max ways | 1 + |
socket | Socket R4 + |
supported memory type | DDR4-2666 + |
technology | CMOS + |
thread count | 16 + |
turbo frequency (1 core) | 4,200 MHz (4.2 GHz, 4,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |