(Fixed a typo in Overview Section.) |
|||
Line 2: | Line 2: | ||
{{core | {{core | ||
|name=Cascade Lake W | |name=Cascade Lake W | ||
− | |image=cascade lake w (front).png | + | |image=cascade-lake-w (front).png |
|developer=Intel | |developer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
− | |first announced= | + | |first announced=October 7, 2019 |
− | |first launched= | + | |first launched=October 7, 2019 |
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
Line 13: | Line 13: | ||
|word=64 bit | |word=64 bit | ||
|proc=14 nm | |proc=14 nm | ||
− | |package name 1=intel, | + | |package name 1=intel,fclga_2066 |
|predecessor=Skylake W | |predecessor=Skylake W | ||
|predecessor link=intel/cores/skylake_w | |predecessor link=intel/cores/skylake_w |
Latest revision as of 11:34, 7 October 2019
Edit Values | |
Cascade Lake W | |
![]() | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Introduction | October 7, 2019 (announced) October 7, 2019 (launched) |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Glacier Falls |
Word Size | 8 octets 64 bit16 nibbles |
Process | 14 nm 0.014 μm 1.4e-5 mm |
Packaging | |
Package | FCLGA-2066 (LGA) |
Dimension | 52.5 mm × 45 mm |
Pitch | 1.016 mm |
Contacts | 2066 |
Socket | Socket R4 |
Succession | |
Cascade Lake W (Cascade Lake Workstations; CLS-W) is codename for Intel's enterprise workstation microprocessor line based on the Cascade Lake microarchitecture, succeeding Skylake W. Cascade Lake W processors feature a number of enhancements including a new AVX512 x86 extension for neural network / deep learning workloads. Cascade Lake W series of processors are branded as the Xeon W family.
Overview[edit]
Cascade Lake W are enterprise workstation microprocessors. Those are a two-chip solution consisting of the microprocessor and the Lewisburg chipset. All processors are socket FCLGA-3647, manufactured on Intel's enhanced 14++ nm process based on the Skylake microarchitecture. Those are single-socket chips only. Geared toward business workstations, those processors come with all the related features such as vPro, Volume Management Device (VMD), and RAS.
Common Features[edit]
For the most part, Cascade Lake W processors come with all the features enabled and only core count and frequency being the differentiating feature. It's worth pointing out that the Skylake W come with AVX-512 along with two full execution units, similar to the high-end Skylake SP models (with the exception of the two low-end models). All models have 48 PCIe lanes and have all the following features in common:
- Mem: 1 TiB of quad-channel DDR4-2933 ECC Memory
- M models support 2 TiB of memory
- DPC RDIMM and LRDIMM \w ECC
- I/O: 64 PCIe 3.0 Lanes
- TDP: 160 W - 205 W
- ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX-512-F/CD/BW/DQ/VL/VNNI with 2 FMA units)
- Features: Speed Shift, vPro, VT-x/EPT, VT-d, TBT 2.0, TSX, TXT, SpeedStep, Identity Protection, Secure Key, MPX, OS Guard, and Volume Management Device (VMD).
Cascade Lake W Processors[edit]
Note that for the lower core-count models, the L3 cache size is larger than it would otherwise be due to additional cache slices being enabled from disabled cores.
See also[edit]
|
designer | Intel + |
first announced | October 7, 2019 + |
first launched | October 7, 2019 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | ![]() |
manufacturer | Intel + |
microarchitecture | Cascade Lake + |
name | Cascade Lake W + |
package | FCLGA-2066 + |
platform | Glacier Falls + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket R4 + |
word size | 64 bit (8 octets, 16 nibbles) + |