Difference between revisions of "intel/core i5/i5-9400h"

	Edit Values
	Core i5-9400H
	Coffee Lake H, Front
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i5-9400H
Market	Mobile
Introduction	April 23, 2019 (announced); April 23, 2019 (launched)
Shop	Amazon
	General Specs
Family	Core i5
Series	i5-9000
Locked	Yes
Frequency	2,500 MHz
Turbo Frequency	4,300 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	25
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Coffee Lake
Platform	Coffee Lake
Chipset	300 series
Core Name	Coffee Lake HR
Core Family	6
Core Model	158
Process	14 nm
Technology	CMOS
Die	126 mm²
Word Size	64 bit
Cores	4
Threads	8
Max Memory	64 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
TDP	45 W
cTDP down	35 W
Tjunction	0 °C – 100 °C
	Packaging
Package	FCBGA-1440 (BGA)
Dimension	42 mm x 28 mm x 1.49 mm
Pitch	0.65 mm
Ball Count	1440
Ball Comp	SAC405
Interconnect	BGA-1440

Latest revision as of 10:57, 20 September 2024

Core i5-9400H is a 64-bit quad-core mid-range performance x86 mobile microprocessor introduced by Intel in 2018. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process. The i5-9400H operates at 2.5 GHz with a TDP of 45 W and a turbo boost of up to 4.3 GHz. This chip integrates Intel's UHD Graphics 630 GPU operating at 350 MHz with a burst frequency of up to 1.1 GHz and supports up to 64 GiB of dual-channel DDR4-2666 memory.

This model has a configurable TDP-down of 35 W.

Cache[edit]

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

256 KiB

262,144 B
0.25 MiB

L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative	write-back

L2$

1 MiB

1,024 KiB
1,048,576 B
9.765625e-4 GiB

		4x256 KiB	4-way set associative	write-back

L3$

8 MiB

8,192 KiB
8,388,608 B
0.00781 GiB

		4x2 MiB	16-way set associative	write-back

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2666, LPDDR3-2133
Supports ECC	No
Max Mem	64 GiB
Controllers	1
Channels	2
Width	64 bit
Max Bandwidth	41.8 GiB/s 42,803.2 MiB/s 44.882 GB/s 44,882.408 MB/s 0.0408 TiB/s 0.0449 TB/s
Bandwidth	Single 20.9 GiB/s Double 41.8 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe	Revision: 3.0
	Max Lanes: 16
	Configuration: 1x16, 2x8, 1x8+2x4

Graphics[edit]

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

UHD Graphics 630

Designer

Intel

Device ID

0x3E9B

Execution Units

24

Max Displays

3

Max Memory

64 GiB

65,536 MiB
67,108,864 KiB
68,719,476,736 B

Frequency

350 MHz

0.35 GHz
350,000 KHz

Burst Frequency

1,100 MHz

1.1 GHz
1,100,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.5
OpenCL	2.0
DP	1.2
eDP	1.4
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel InTru 3D

Intel Clear Video

Intel Clear Video HD

[Edit] Coffee Lake (Gen9.5) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, MVC, Stereo	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main	5.1	2160p (4K)	Main, Main 10	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High, Simple	3840x3840
VP8	Unified	Unified	N/A	0	Unified	1080p
VP9	0		2160p (4K)	0, 2	Unified	2160p (4K)

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
SST	Speed Shift Technology
TXT	Trusted Execution Technology (SMX)
vPro	Intel vPro
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions
MPX	Memory Protection Extensions
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
SMEP	OS Guard Technology
Flex Memory	Flex Memory Access
SIPP	Stable Image Platform Program
IPT	Identity Protection Technology

@@ Line 8: / Line 8: @@
 |model number=i5-9400H
 |market=Mobile
+|first announced=April 23, 2019
+|first launched=April 23, 2019
 |family=Core i5
 |series=i5-9000
 |locked=Yes
-|frequency=2,500 Mz
+|frequency=2,500 MHz
 |turbo frequency1=4,300 MHz
 |bus type=DMI 3.0
@@ Line 29: / Line 31: @@
 |die area=126 mm²
 |word size=64 bit
-|core count=6
+|core count=4
-|thread count=6
+|thread count=8
 |max cpus=1
 |max memory=64 GiB
@@ Line 39: / Line 41: @@
 |package module 1={{packages/intel/fcbga-1440}}
 }}
-'''Core i5-9400H''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in [[2018]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i5-9400H operates at ? GHz with a TDP of 45 W and a {{intel|turbo boost}} of up to 4.3 GHz. This chip integrates Intel's {{intel|UHD Graphics 630}} GPU operating at 350 MHz with a burst frequency of up to 1.1 GHz and supports up to 64 GiB of dual-channel DDR4-2666 memory.
+'''Core i5-9400H''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in [[2018]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i5-9400H operates at 2.5 GHz with a TDP of 45 W and a {{intel|turbo boost}} of up to 4.3 GHz. This chip integrates Intel's {{intel|UHD Graphics 630}} GPU operating at 350 MHz with a burst frequency of up to 1.1 GHz and supports up to 64 GiB of dual-channel DDR4-2666 memory.
 This model has a configurable TDP-down of 35 W.
-{{unknown features}}
@@ Line 50: / Line 49: @@
 {{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
 {{cache size
-|l1 cache=384 KiB
+|l1 cache=256 KiB
-|l1i cache=192 KiB
+|l1i cache=128 KiB
-|l1i break=6x32 KiB
+|l1i break=4x32 KiB
 |l1i desc=8-way set associative
-|l1d cache=192 KiB
+|l1d cache=128 KiB
-|l1d break=6x32 KiB
+|l1d break=4x32 KiB
 |l1d desc=8-way set associative
 |l1d policy=write-back
-|l2 cache=1.5 MiB
+|l2 cache=1 MiB
-|l2 break=6x256 KiB
+|l2 break=4x256 KiB
 |l2 desc=4-way set associative
 |l2 policy=write-back
-|l3 cache=9 MiB
+|l3 cache=8 MiB
-|l3 break=6x1.5 MiB
+|l3 break=4x2 MiB
-|l3 desc=12-way set associative
+|l3 desc=16-way set associative
 |l3 policy=write-back
 }}
@@ Line 77: / Line 76: @@
 |channels=2
 |width=64 bit
-|max bandwidth=39.74 GiB/s
+|max bandwidth=41.8 GiB/s
-|bandwidth schan=19.87 GiB/s
+|bandwidth schan=20.9 GiB/s
-|bandwidth dchan=39.74 GiB/s
+|bandwidth dchan=41.8 GiB/s
 }}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-9400H - Intel#package + and Core i5-9400H - Intel#pcie +
base frequency	2,500 MHz (2.5 GHz, 2,500,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	300 series +
clock multiplier	25 +
core count	4 +
core family	6 +
core model	158 +
core name	Coffee Lake HR +
designer	Intel +
device id	0x3E9B +
die area	126 mm² (0.195 in², 1.26 cm², 126,000,000 µm²) +
family	Core i5 +
first announced	April 23, 2019 +
first launched	April 23, 2019 +
full page name	intel/core i5/i5-9400h +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Stable Image Platform Program + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel secure key technology	true +
has intel speed shift technology	true +
has intel stable image platform program support	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	UHD Graphics 630 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	1,100 MHz (1.1 GHz, 1,100,000 KHz) +
integrated gpu max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	16-way set associative +
l3$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldate	April 23, 2019 +
main image	+
main image caption	Coffee Lake H, Front +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	41.8 GiB/s (42,803.2 MiB/s, 44.882 GB/s, 44,882.408 MB/s, 0.0408 TiB/s, 0.0449 TB/s) +
max memory channels	2 +
microarchitecture	Coffee Lake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	i5-9400H +
name	Core i5-9400H +
package	FCBGA-1440 +
platform	Coffee Lake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
series	i5-9000 +
smp max ways	1 +
supported memory type	DDR4-2666 + and LPDDR3-2133 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
tdp down	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	8 +
turbo frequency (1 core)	4,300 MHz (4.3 GHz, 4,300,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

WikiChip

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Social Media

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Technology Nodes

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Apple

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Samsung

Latest revision as of 10:57, 20 September 2024

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Graphics[edit]

Features[edit]