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Difference between revisions of "hisilicon/k3/k3v1"
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{{hisilicon title|K3V1}} | {{hisilicon title|K3V1}} | ||
− | {{ | + | {{chip |
|name=K3V1 | |name=K3V1 | ||
|no image=Yes | |no image=Yes | ||
|designer=HiSilicon | |designer=HiSilicon | ||
+ | |designer 2=ARM Holdings | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
|model number=K3V1 | |model number=K3V1 | ||
Line 50: | Line 51: | ||
}} | }} | ||
+ | == Expansions == | ||
+ | * 4x high-speed UART interfaces | ||
+ | * 2x SPI | ||
+ | * 2x I2C | ||
+ | * USB 2.0 On-The-Go (HS OTG) PHY | ||
+ | * USB 1.1 | ||
+ | * 2x MMC/SD/SDIO interface | ||
+ | * 14x GPIOs | ||
+ | * 8 Timers | ||
+ | == Features == | ||
+ | {{arm features | ||
+ | |thumb=No | ||
+ | |thumb2=No | ||
+ | |thumbee=No | ||
+ | |vfpv1=No | ||
+ | |vfpv2=No | ||
+ | |vfpv3=No | ||
+ | |vfpv3-d16=No | ||
+ | |vfpv3-f16=No | ||
+ | |vfpv4=No | ||
+ | |vfpv4-d16=No | ||
+ | |vfpv5=No | ||
+ | |neon=No | ||
+ | |trustzone=No | ||
+ | |jazelle=Yes | ||
+ | |wmmx=No | ||
+ | |wmmx2=No | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | The K3V1 integrated graphics engine, although the exact specs are not available. | ||
+ | |||
+ | * Support QVGA, WQVGA, VGA display resolutions | ||
+ | * Hardware-acceleration video | ||
+ | ** Decode: [[MPEG4]], [[H.263]], [[H.264]], and [[VC-1]] | ||
+ | *** Rate QCIF/CIF/QVGA/VGA/D1, frame rate up to 30fps | ||
+ | ** Encode: MPEG4 and H.263 video encoding | ||
+ | *** QCIF/CIF/QVGA/VGA, frame rate up to 30fps | ||
+ | * 200 KiB Frame Buffer | ||
+ | |||
+ | == Camera == | ||
+ | * Support 30 million pixel camera, up to 30fps | ||
+ | * Supports up to 8 megapixel CMOS Sensor image input | ||
+ | |||
+ | == Audio == | ||
+ | * Built-in high-performance audio CODEC | ||
+ | ** Sampling frequency support 44.1kHz and 48kHz | ||
+ | ** support for sound playback and recording | ||
+ | * High quality stereo playback DAC and 1 channel Voice DAC, 2 channels | ||
+ | ** ADC, CODEC support any audio mixing, independent of the amplifier Output gain control | ||
+ | |||
+ | == Block Diagram == | ||
+ | [[File:hisilicon k3v1 block.png|700px]] | ||
== Documents == | == Documents == | ||
* [[:File:k3v1 prod brief.pdf|K3V1 Product Brief]] | * [[:File:k3v1 prod brief.pdf|K3V1 Product Brief]] |
Latest revision as of 20:30, 3 June 2018
Edit Values | |||||||||
K3V1 | |||||||||
General Info | |||||||||
Designer | HiSilicon, ARM Holdings | ||||||||
Manufacturer | TSMC | ||||||||
Model Number | K3V1 | ||||||||
Part Number | Hi3611 | ||||||||
Market | Mobile | ||||||||
Introduction | June, 2008 (announced) June, 2008 (launched) | ||||||||
General Specs | |||||||||
Family | K3 | ||||||||
Frequency | 460 | ||||||||
Microarchitecture | |||||||||
ISA | ARMv5 (ARM) | ||||||||
Microarchitecture | ARM9 | ||||||||
Core Name | ARM926EJ-S | ||||||||
Process | 0.18 µm | ||||||||
Transistors | 200,000,000 | ||||||||
Technology | CMOS | ||||||||
Word Size | 32 bit | ||||||||
Cores | 1 | ||||||||
Threads | 1 | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
VI/O | 1.8 V, 2.5 V | ||||||||
Packaging | |||||||||
|
K3V1 is a 32-bit performance ARM microprocessor introduced by HiSilicon in 2008. This chip incorporates a single ARM9 core with Jazelle support operating at 460 MHz (although later models might have supported higher frequency). This chip supports 32-bit or 16-bit DDR memory.
Contents
Cache[edit]
- Main article: ARM9 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
- 4x high-speed UART interfaces
- 2x SPI
- 2x I2C
- USB 2.0 On-The-Go (HS OTG) PHY
- USB 1.1
- 2x MMC/SD/SDIO interface
- 14x GPIOs
- 8 Timers
Features[edit]
[Edit/Modify Supported Features]
Supported ARM Extensions & Processor Features
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|
Graphics[edit]
The K3V1 integrated graphics engine, although the exact specs are not available.
- Support QVGA, WQVGA, VGA display resolutions
- Hardware-acceleration video
- 200 KiB Frame Buffer
Camera[edit]
- Support 30 million pixel camera, up to 30fps
- Supports up to 8 megapixel CMOS Sensor image input
Audio[edit]
- Built-in high-performance audio CODEC
- Sampling frequency support 44.1kHz and 48kHz
- support for sound playback and recording
- High quality stereo playback DAC and 1 channel Voice DAC, 2 channels
- ADC, CODEC support any audio mixing, independent of the amplifier Output gain control
Block Diagram[edit]
Documents[edit]
Facts about "K3V1 - HiSilicon"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | K3V1 - HiSilicon#package + |
base frequency | 460 MHz (0.46 GHz, 460,000 kHz) + |
core count | 1 + |
core name | ARM926EJ-S + |
designer | HiSilicon + and ARM Holdings + |
family | K3 + |
first announced | June 2008 + |
first launched | June 2008 + |
full page name | hisilicon/k3/k3v1 + |
has ecc memory support | false + |
instance of | microprocessor + |
io voltage | 1.8 V (18 dV, 180 cV, 1,800 mV) + and 2.5 V (25 dV, 250 cV, 2,500 mV) + |
isa | ARMv5 + |
isa family | ARM + |
l1$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
ldate | June 2008 + |
manufacturer | TSMC + |
market segment | Mobile + |
max cpu count | 1 + |
max memory channels | 1 + |
microarchitecture | ARM9 + |
model number | K3V1 + |
name | K3V1 + |
package | TFBGA-460 + |
part number | Hi3611 + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |
smp max ways | 1 + |
supported memory type | DDR + |
technology | CMOS + |
thread count | 1 + |
transistor count | 200,000,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |