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Difference between revisions of "intel/celeron/807ue"
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{{intel title|Celeron 807UE}} | {{intel title|Celeron 807UE}} | ||
− | {{ | + | {{chip |
|name=Celeron 807UE | |name=Celeron 807UE | ||
|no image=Yes | |no image=Yes | ||
Line 8: | Line 8: | ||
|part number=AV8062701188200 | |part number=AV8062701188200 | ||
|s-spec=SR0NB | |s-spec=SR0NB | ||
− | |market= | + | |market=Embedded |
+ | |first announced=December, 2011 | ||
+ | |first launched=July, 2012 | ||
|family=Celeron | |family=Celeron | ||
|series=800 | |series=800 | ||
Line 16: | Line 18: | ||
|bus links=4 | |bus links=4 | ||
|bus rate=5 GT/s | |bus rate=5 GT/s | ||
+ | |clock multiplier=10 | ||
|cpuid=0x206A7 | |cpuid=0x206A7 | ||
|isa=x86-64 | |isa=x86-64 | ||
Line 44: | Line 47: | ||
|package module 1={{packages/intel/fcbga-1023}} | |package module 1={{packages/intel/fcbga-1023}} | ||
}} | }} | ||
+ | '''Celeron 807UE''' is a [[single-core]] budget mobile embedded [[x86]] microprocessor introduced by [[Intel]] in mid-[[2012]]. The Celeron 807UE, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1 GHz with an ultra-low [[TDP]] of just 10 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a burst frequency of 800 MHz. This processor supports 4 GiB of single-channel DDR3-1333 ECC memory. | ||
== Cache == | == Cache == | ||
+ | {{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}} | ||
+ | {{cache size | ||
+ | |l1 cache=64 KiB | ||
+ | |l1i cache=32 KiB | ||
+ | |l1i break=1x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1d cache=32 KiB | ||
+ | |l1d break=1x32 KiB | ||
+ | |l1d desc=8-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=256 KiB | ||
+ | |l2 break=1x256 KiB | ||
+ | |l2 desc=8-way set associative | ||
+ | |l2 policy=write-back | ||
+ | |l3 cache=1.5 MiB | ||
+ | |l3 break=1x1.5 MiB | ||
+ | |l3 desc=12-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
== Memory controller == | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR3-1333 | ||
+ | |type 2=DDR3-1066 | ||
+ | |ecc=Yes | ||
+ | |max mem=4 GiB | ||
+ | |controllers=1 | ||
+ | |channels=1 | ||
+ | |max bandwidth=9.93 GiB/s | ||
+ | |bandwidth schan=9.93 GiB/s | ||
+ | }} | ||
== Expansions == | == Expansions == | ||
+ | This processor has no PCIe lanes. As per datasheet: | ||
+ | |||
+ | The single core Celeron SKU Intel® Celeron® Processor 807UE does not support PCI Express in any configuration. All of the processor’s PCI Express lanes are disabled for both graphics and I/O. | ||
== Graphics == | == Graphics == | ||
+ | {{integrated graphics | ||
+ | | gpu = HD Graphics (Sandy Bridge) | ||
+ | | device id = 0x0106 | ||
+ | | designer = Intel | ||
+ | | execution units = 6 | ||
+ | | max displays = 2 | ||
+ | | frequency = 350 MHz | ||
+ | | max frequency = 800 MHz | ||
+ | |||
+ | | output crt = Yes | ||
+ | | output sdvo = Yes | ||
+ | | output dsi = | ||
+ | | output edp = Yes | ||
+ | | output dp = Yes | ||
+ | | output hdmi = Yes | ||
+ | | output vga = | ||
+ | | output dvi = | ||
+ | |||
+ | | directx ver = 10.1 | ||
+ | | opengl ver = 3.1 | ||
+ | | opencl ver = | ||
+ | | hdmi ver = 1.4 | ||
+ | | dp ver = 1.1 | ||
+ | | edp ver = 1.1 | ||
+ | |||
+ | | features = Yes | ||
+ | | intel fdi = Yes | ||
+ | }} | ||
+ | {{sandy bridge hardware accelerated video table|col=1}} | ||
== Features == | == Features == | ||
− | {{x86 features}} | + | {{x86 features |
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=No | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=Yes | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=Yes | ||
+ | |fastmem=Yes | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=No | ||
+ | |ept=No | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | }} | ||
+ | |||
+ | == Documents == | ||
+ | === Datasheet === | ||
+ | * [[:File:2nd-gen-core-family-mobile-vol-1-datasheet.pdf|Datasheet, Volume 1]] | ||
+ | * [[:File:2nd-gen-core-family-mobile-vol-2-datasheet.pdf|Datasheet, Volume 2]] | ||
+ | * [[:File:2nd-gen-core-mobile-ecc-datasheet-addendum.pdf|Datasheet Addendum for ECC models]] | ||
+ | === Other === | ||
+ | * [[:File:2nd-gen-core-mobile-thermal-guide.pdf|Thermal Design Guide for Embedded Applications]] | ||
+ | * [[:File:2nd-gen-core-family-mobile-specification-update.pdf|2nd Gen Core Mobile Specification Update]] |
Latest revision as of 19:19, 17 March 2018
Edit Values | |||||||||
Celeron 807UE | |||||||||
General Info | |||||||||
Designer | Intel | ||||||||
Manufacturer | Intel | ||||||||
Model Number | 807UE | ||||||||
Part Number | AV8062701188200 | ||||||||
S-Spec | SR0NB | ||||||||
Market | Embedded | ||||||||
Introduction | December, 2011 (announced) July, 2012 (launched) | ||||||||
Shop | Amazon | ||||||||
General Specs | |||||||||
Family | Celeron | ||||||||
Series | 800 | ||||||||
Locked | Yes | ||||||||
Frequency | 1,000 MHz | ||||||||
Bus type | DMI 2.0 | ||||||||
Bus rate | 4 × 5 GT/s | ||||||||
Clock multiplier | 10 | ||||||||
CPUID | 0x206A7 | ||||||||
Microarchitecture | |||||||||
ISA | x86-64 (x86) | ||||||||
Microarchitecture | Sandy Bridge | ||||||||
Platform | Sandy Bridge M | ||||||||
Chipset | Cougar Point | ||||||||
Core Name | Sandy Bridge M | ||||||||
Core Family | 6 | ||||||||
Core Model | 42 | ||||||||
Core Stepping | Q0 | ||||||||
Process | 32 nm | ||||||||
Transistors | 504,000,000 | ||||||||
Technology | CMOS | ||||||||
Die | 131 mm² | ||||||||
Word Size | 64 bit | ||||||||
Cores | 1 | ||||||||
Threads | 1 | ||||||||
Max Memory | 4 GiB | ||||||||
Multiprocessing | |||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||
Electrical | |||||||||
Vcore | 0.3 V-1.52 V | ||||||||
TDP | 10 W | ||||||||
Tjunction | 0 °C – 100 °C | ||||||||
Tstorage | -25 °C – 125 °C | ||||||||
Packaging | |||||||||
|
Celeron 807UE is a single-core budget mobile embedded x86 microprocessor introduced by Intel in mid-2012. The Celeron 807UE, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1 GHz with an ultra-low TDP of just 10 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 350 MHz with a burst frequency of 800 MHz. This processor supports 4 GiB of single-channel DDR3-1333 ECC memory.
Contents
Cache[edit]
- Main article: Sandy Bridge § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
This processor has no PCIe lanes. As per datasheet:
The single core Celeron SKU Intel® Celeron® Processor 807UE does not support PCI Express in any configuration. All of the processor’s PCI Express lanes are disabled for both graphics and I/O.
Graphics[edit]
Integrated Graphics Information
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[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps |
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Documents[edit]
Datasheet[edit]
Other[edit]
Facts about "Celeron 807UE - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron 807UE - Intel#package + |
base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
bus links | 4 + |
bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
bus type | DMI 2.0 + |
chipset | Cougar Point + |
clock multiplier | 10 + |
core count | 1 + |
core family | 6 + |
core model | 42 + |
core name | Sandy Bridge M + |
core stepping | Q0 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.3 V (3 dV, 30 cV, 300 mV) + |
cpuid | 0x206A7 + |
designer | Intel + |
device id | 0x0106 + |
die area | 131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) + |
family | Celeron + |
first announced | December 2011 + |
first launched | July 2012 + |
full page name | intel/celeron/807ue + |
has ecc memory support | true + |
has feature | Enhanced SpeedStep Technology +, Intel VT-x + and Flex Memory Access + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics (Sandy Bridge) + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 6 + |
integrated gpu max frequency | 800 MHz (0.8 GHz, 800,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
ldate | July 2012 + |
manufacturer | Intel + |
market segment | Embedded + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max memory bandwidth | 9.93 GiB/s (10,168.32 MiB/s, 10.662 GB/s, 10,662.256 MB/s, 0.0097 TiB/s, 0.0107 TB/s) + |
max memory channels | 1 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Sandy Bridge + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | 807UE + |
name | Celeron 807UE + |
package | FCBGA-1023 + |
part number | AV8062701188200 + |
platform | Sandy Bridge M + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
s-spec | SR0NB + |
series | 800 + |
smp max ways | 1 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |
tdp | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
technology | CMOS + |
thread count | 1 + |
transistor count | 504,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |