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Difference between revisions of "intel/microarchitectures/penryn (client)"
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| phase-out = September, 2008 | | phase-out = September, 2008 | ||
| process = 45 nm | | process = 45 nm | ||
| − | + | |isa=x86-64 | |
| succession = Yes | | succession = Yes | ||
| predecessor = Core | | predecessor = Core | ||
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== Die Shot == | == Die Shot == | ||
| + | |||
| + | ===Dual-core Penryn 3MB=== | ||
| + | * 3MB L2 cache | ||
| + | * 81 mm² | ||
| + | * 274,000,000 transistors | ||
| + | * [[45 nm process]] | ||
| + | * 2 cores | ||
| + | |||
| + | : [[File:intel penryn core duo die shot 3mb.jpeg|300px]] | ||
| − | ===Dual-core Penryn=== | + | ===Dual-core Penryn 6MB=== |
| + | * 6MB L2 cache | ||
* 107 mm² | * 107 mm² | ||
* 410,000,000 transistors | * 410,000,000 transistors | ||
Latest revision as of 20:08, 9 March 2018
| Edit Values | |
| Penryn µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | November, 2007 |
| Phase-out | September, 2008 |
| Process | 45 nm |
| Instructions | |
| ISA | x86-64 |
| Succession | |
Penryn was the microarchitecture for Intel's 45 nm process for desktops and servers as a successor to Core. Penryn was replaced by the Nehalem microarchitecture in late 2008.
Dunnington wafer
Die Shot[edit]
Dual-core Penryn 3MB[edit]
- 3MB L2 cache
- 81 mm²
- 274,000,000 transistors
- 45 nm process
- 2 cores
Dual-core Penryn 6MB[edit]
- 6MB L2 cache
- 107 mm²
- 410,000,000 transistors
- 45 nm process
- 2 cores
Hexa-core Penryn[edit]
- 503 mm²
- 1,900,000,000 transistors
- 45 nm process
- 6 cores
Facts about "Penryn - Microarchitectures - Intel"
| codename | Penryn + |
| designer | Intel + |
| first launched | November 2007 + |
| full page name | intel/microarchitectures/penryn (client) + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Penryn + |
| phase-out | September 2008 + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) + |